@@ -1750,7 +1750,7 @@ static void ggml_cuda_op_mul_mat(
17501750}
17511751
17521752static __global__ void k_compute_batched_ptrs (
1753- const half * src0_as_f16, const half * src1_as_f16, char * dst,
1753+ const void * src0_as_f16, const void * src1_as_f16, char * dst,
17541754 const void ** ptrs_src, void ** ptrs_dst,
17551755 int64_t ne12, int64_t ne13,
17561756 int64_t ne23,
@@ -1773,91 +1773,139 @@ static __global__ void k_compute_batched_ptrs(
17731773 ptrs_dst[0 *ne23 + i12 + i13*ne12] = ( char *) dst + i12*nbd2 + i13*nbd3;
17741774}
17751775
1776- static void ggml_cuda_mul_mat_batched_cublas (ggml_backend_cuda_context & ctx, const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
1776+ // Type traits for mapping ggml types to CUDA/cuBLAS types
1777+ template <ggml_type T>
1778+ struct batched_mul_mat_traits ;
1779+
1780+ template <>
1781+ struct batched_mul_mat_traits <GGML_TYPE_F32> {
1782+ using cuda_type = float ;
1783+ static inline const cublasComputeType_t compute_type = CUBLAS_COMPUTE_32F;
1784+ static inline const cudaDataType_t data_type = CUDA_R_32F;
1785+ static inline const ggml_type ggml_type_val = GGML_TYPE_F32;
1786+ static inline const float alpha = 1 .0f ;
1787+ static inline const float beta = 0 .0f ;
1788+ static inline const void * get_alpha () { static const float val = alpha; return &val; }
1789+ static inline const void * get_beta () { static const float val = beta; return &val; }
1790+ static inline auto get_nc_converter (ggml_type src_type) { return ggml_get_to_fp32_nc_cuda (src_type); }
1791+ };
1792+
1793+ template <>
1794+ struct batched_mul_mat_traits <GGML_TYPE_BF16> {
1795+ using cuda_type = nv_bfloat16;
1796+ static inline const cublasComputeType_t compute_type = CUBLAS_COMPUTE_32F;
1797+ static inline const cudaDataType_t data_type = CUDA_R_16BF;
1798+ static inline const ggml_type ggml_type_val = GGML_TYPE_BF16;
1799+ static inline const float alpha = 1 .0f ;
1800+ static inline const float beta = 0 .0f ;
1801+ static inline const void * get_alpha () { static const float val = alpha; return &val; }
1802+ static inline const void * get_beta () { static const float val = beta; return &val; }
1803+ static inline auto get_nc_converter (ggml_type src_type) { return ggml_get_to_bf16_nc_cuda (src_type); }
1804+ };
1805+
1806+ template <>
1807+ struct batched_mul_mat_traits <GGML_TYPE_F16> {
1808+ using cuda_type = half;
1809+ static inline const cublasComputeType_t compute_type = CUBLAS_COMPUTE_16F;
1810+ static inline const cudaDataType_t data_type = CUDA_R_16F;
1811+ static inline const ggml_type ggml_type_val = GGML_TYPE_F16;
1812+ static inline const half alpha = 1.0 ;
1813+ static inline const half beta = 0.0 ;
1814+ static inline const void * get_alpha () { static const half val = alpha; return &val; }
1815+ static inline const void * get_beta () { static const half val = beta; return &val; }
1816+ static inline auto get_nc_converter (ggml_type src_type) { return ggml_get_to_fp16_nc_cuda (src_type); }
1817+ };
1818+
1819+ template <ggml_type src0_type>
1820+ static void ggml_cuda_mul_mat_batched_cublas_impl (ggml_backend_cuda_context & ctx, const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
1821+ using traits = batched_mul_mat_traits<src0_type>;
1822+ using cuda_t = typename traits::cuda_type;
1823+
17771824 GGML_ASSERT (!ggml_is_transposed (src0));
17781825 GGML_ASSERT (!ggml_is_transposed (src1));
1779-
17801826 GGML_ASSERT (!ggml_backend_buft_is_cuda_split (src0->buffer ->buft ));
1781- GGML_ASSERT (src0->type == GGML_TYPE_F16);
1827+ GGML_ASSERT (src0->type == src0_type);
1828+ GGML_ASSERT (ggml_is_contiguous (dst));
17821829
17831830 // Byte offsets and tensor dimensions are currently used in an inconsistent way for dst.
17841831 // As long as dst is contiguous this does not matter though.
1785- GGML_ASSERT (ggml_is_contiguous (dst));
17861832
17871833 GGML_TENSOR_BINARY_OP_LOCALS
17881834
17891835 const int64_t ne_dst = ggml_nelements (dst);
1790-
17911836 cudaStream_t main_stream = ctx.stream ();
1792-
17931837 CUBLAS_CHECK (cublasSetStream (ctx.cublas_handle (), main_stream));
17941838
1795- const half * src0_f16 = (const half *) src0->data ;
17961839 float * dst_ddf = (float *) dst->data ;
1797-
1798- const half * src1_f16 = (const half *) src1->data ;
17991840 const size_t ts_src1 = ggml_type_size (src1->type );
18001841 GGML_ASSERT (nb10 == ts_src1);
18011842 int64_t s11 = nb11 / ts_src1;
18021843 int64_t s12 = nb12 / ts_src1;
18031844 int64_t s13 = nb13 / ts_src1;
1804- ggml_cuda_pool_alloc<half> src1_f16_alloc (ctx.pool ());
18051845
1806- // convert src1 to fp16
1807- if (src1->type != GGML_TYPE_F16) {
1808- const to_fp16_nc_cuda_t to_fp16_cuda = ggml_get_to_fp16_nc_cuda (src1->type );
1809- const int64_t ne_src1 = ggml_nelements (src1);
1810- src1_f16_alloc.alloc (ne_src1);
1811- GGML_ASSERT (to_fp16_cuda != nullptr );
1846+ const cuda_t * src0_ptr = nullptr ;
1847+ const cuda_t * src1_ptr = nullptr ;
18121848
1813- to_fp16_cuda (src1_f16, src1_f16_alloc.get (), ne10, ne11, ne12, ne13, s11, s12, s13, main_stream);
1849+ ggml_cuda_pool_alloc<cuda_t > src0_alloc (ctx.pool ());
1850+ ggml_cuda_pool_alloc<cuda_t > src1_alloc (ctx.pool ());
1851+
1852+ // Handle src0
1853+ src0_ptr = (const cuda_t *) src0->data ;
1854+
1855+ // Handle src1 - convert if necessary
1856+ if (src1->type == src0_type) {
1857+ src1_ptr = (const cuda_t *) src1->data ;
1858+ } else {
1859+ // Convert src1 to target type using traits conversion functions
1860+ const int64_t ne_src1 = ggml_nelements (src1);
1861+ src1_alloc.alloc (ne_src1);
18141862
1815- src1_f16 = src1_f16_alloc.get ();
1863+ const auto convert_func = traits::get_nc_converter (src1->type );
1864+ GGML_ASSERT (convert_func != nullptr );
1865+ convert_func (src1->data , src1_alloc.get (), ne10, ne11, ne12, ne13, s11, s12, s13, main_stream);
1866+ src1_ptr = src1_alloc.get ();
18161867 s11 = ne10;
18171868 s12 = ne11*s11;
18181869 s13 = ne12*s12;
18191870 }
18201871
1821- ggml_cuda_pool_alloc<half> dst_f16 (ctx.pool ());
1872+ // Setup destination buffer
1873+ ggml_cuda_pool_alloc<cuda_t > dst_temp (ctx.pool ());
18221874 char * dst_t ;
1823-
1824- cublasComputeType_t cu_compute_type = CUBLAS_COMPUTE_16F;
1825- cudaDataType_t cu_data_type = CUDA_R_16F;
1826-
1827- // dst strides
18281875 size_t nbd2 = dst->nb [2 ];
18291876 size_t nbd3 = dst->nb [3 ];
18301877
1831- const half alpha_f16 = 1 .0f ;
1832- const half beta_f16 = 0 .0f ;
1833-
1878+ cublasComputeType_t cu_compute_type = traits::compute_type;
1879+ cudaDataType_t cu_data_type = traits::data_type;
1880+ cudaDataType_t cu_data_type_a = traits::data_type;
1881+ cudaDataType_t cu_data_type_b = traits::data_type;
1882+ const void * alpha = traits::get_alpha ();
1883+ const void * beta = traits::get_beta ();
18341884 const float alpha_f32 = 1 .0f ;
1835- const float beta_f32 = 0 .0f ;
1836-
1837- const void * alpha = &alpha_f16;
1838- const void * beta = &beta_f16;
1885+ const float beta_f32 = 0 .0f ;
18391886
18401887 if (dst->op_params [0 ] == GGML_PREC_DEFAULT) {
1841- dst_t = (char *) dst_f16.alloc (ne_dst);
1842-
1843- nbd2 /= sizeof (float ) / sizeof (half);
1844- nbd3 /= sizeof (float ) / sizeof (half);
1888+ if constexpr (src0_type == GGML_TYPE_F32) {
1889+ dst_t = (char *) dst_ddf; // Direct F32 output
1890+ } else {
1891+ dst_t = (char *) dst_temp.alloc (ne_dst);
1892+ nbd2 /= sizeof (float ) / sizeof (cuda_t );
1893+ nbd3 /= sizeof (float ) / sizeof (cuda_t );
1894+ }
18451895 } else {
18461896 dst_t = (char *) dst_ddf;
1847-
18481897 cu_compute_type = CUBLAS_COMPUTE_32F;
1849- cu_data_type = CUDA_R_32F;
1850-
1898+ cu_data_type = CUDA_R_32F;
18511899 alpha = &alpha_f32;
1852- beta = &beta_f32;
1900+ beta = &beta_f32;
18531901 }
18541902
18551903 int id = ggml_cuda_get_device ();
18561904 const int cc = ggml_cuda_info ().devices [id].cc ;
18571905 if (GGML_CUDA_CC_IS_CDNA (cc) || GGML_CUDA_CC_IS_RDNA4 (cc)) {
18581906 cu_compute_type = CUBLAS_COMPUTE_32F;
18591907 alpha = &alpha_f32;
1860- beta = &beta_f32;
1908+ beta = &beta_f32;
18611909 }
18621910
18631911 GGML_ASSERT (ne12 % ne02 == 0 );
@@ -1867,35 +1915,15 @@ static void ggml_cuda_mul_mat_batched_cublas(ggml_backend_cuda_context & ctx, co
18671915 const int64_t r2 = ne12/ne02;
18681916 const int64_t r3 = ne13/ne03;
18691917
1870- #if 0
1871- // use cublasGemmEx
1872- {
1873- for (int i13 = 0; i13 < ne13; ++i13) {
1874- for (int i12 = 0; i12 < ne12; ++i12) {
1875- int i03 = i13 / r3;
1876- int i02 = i12 / r2;
1877-
1878- CUBLAS_CHECK(
1879- cublasGemmEx(ctx.cublas_handle(), CUBLAS_OP_T, CUBLAS_OP_N,
1880- ne01, ne11, ne10,
1881- alpha, (const char *) src0_f16 + i03*nb03 + i02*nb02, CUDA_R_16F, nb01/sizeof(half),
1882- src1_f16 + i13*s13 + i12*s12, CUDA_R_16F, s11,
1883- beta, ( char *) dst_t + i13*nbd3 + i12*nbd2, cu_data_type, ne0,
1884- cu_compute_type,
1885- CUBLAS_GEMM_DEFAULT_TENSOR_OP));
1886- }
1887- }
1888- }
1889- #else
18901918 if (r2 == 1 && r3 == 1 && ggml_is_contiguous_2 (src0) && ggml_is_contiguous_2 (src1)) {
18911919 // there is no broadcast and src0, src1 are contiguous across dims 2, 3
18921920 // use cublasGemmStridedBatchedEx
18931921 CUBLAS_CHECK (
18941922 cublasGemmStridedBatchedEx (ctx.cublas_handle (), CUBLAS_OP_T, CUBLAS_OP_N,
18951923 ne01, ne11, ne10,
1896- alpha, src0_f16, CUDA_R_16F, nb01/nb00, nb02/nb00, // strideA
1897- src1_f16, CUDA_R_16F, s11, s12, // strideB
1898- beta, dst_t , cu_data_type, ne0, ne1*ne0, // strideC
1924+ alpha, src0_ptr, cu_data_type_a, nb01/nb00, nb02/nb00, // strideA
1925+ src1_ptr, cu_data_type_b, s11, s12, // strideB
1926+ beta, dst_t , cu_data_type, ne0, ne1*ne0, // strideC
18991927 ne12*ne13,
19001928 cu_compute_type,
19011929 CUBLAS_GEMM_DEFAULT_TENSOR_OP));
@@ -1906,34 +1934,55 @@ static void ggml_cuda_mul_mat_batched_cublas(ggml_backend_cuda_context & ctx, co
19061934 ggml_cuda_pool_alloc<const void *> ptrs_src (ctx.pool (), 2 *ne23);
19071935 ggml_cuda_pool_alloc< void *> ptrs_dst (ctx.pool (), 1 *ne23);
19081936
1937+ size_t src1_stride_size = sizeof (cuda_t );
1938+
19091939 dim3 block_dims (ne13, ne12);
19101940 k_compute_batched_ptrs<<<1 , block_dims, 0 , main_stream>>> (
1911- src0_f16, src1_f16 , dst_t ,
1941+ src0_ptr, src1_ptr , dst_t ,
19121942 ptrs_src.get (), ptrs_dst.get (),
19131943 ne12, ne13,
19141944 ne23,
19151945 nb02, nb03,
1916- src1->type == GGML_TYPE_F16 ? nb12 : s12*sizeof (half) ,
1917- src1->type == GGML_TYPE_F16 ? nb13 : s13*sizeof (half) ,
1946+ ( src1->type == src0_type) ? nb12 : s12*src1_stride_size ,
1947+ ( src1->type == src0_type) ? nb13 : s13*src1_stride_size ,
19181948 nbd2, nbd3,
19191949 r2, r3);
1950+
19201951 CUDA_CHECK (cudaGetLastError ());
19211952
19221953 CUBLAS_CHECK (
19231954 cublasGemmBatchedEx (ctx.cublas_handle (), CUBLAS_OP_T, CUBLAS_OP_N,
19241955 ne01, ne11, ne10,
1925- alpha, (const void **) (ptrs_src.get () + 0 *ne23), CUDA_R_16F, nb01/nb00,
1926- (const void **) (ptrs_src.get () + 1 *ne23), CUDA_R_16F, s11,
1927- beta, ( void **) (ptrs_dst.get () + 0 *ne23), cu_data_type, ne0,
1956+ alpha, (const void **) (ptrs_src.get () + 0 *ne23), cu_data_type_a, nb01/nb00,
1957+ (const void **) (ptrs_src.get () + 1 *ne23), cu_data_type_b, s11,
1958+ beta, ( void **) (ptrs_dst.get () + 0 *ne23), cu_data_type, ne0,
19281959 ne23,
19291960 cu_compute_type,
19301961 CUBLAS_GEMM_DEFAULT_TENSOR_OP));
19311962 }
1932- #endif
19331963
1934- if (dst->op_params [0 ] == GGML_PREC_DEFAULT && cu_data_type == CUDA_R_16F) {
1935- const to_fp32_cuda_t to_fp32_cuda = ggml_get_to_fp32_cuda (GGML_TYPE_F16);
1936- to_fp32_cuda (dst_f16.get (), dst_ddf, ne_dst, main_stream);
1964+ // Convert output back to F32 if needed
1965+ if (dst->op_params [0 ] == GGML_PREC_DEFAULT && cu_data_type != CUDA_R_32F) {
1966+ const to_fp32_cuda_t to_fp32_cuda = ggml_get_to_fp32_cuda (traits::ggml_type_val);
1967+ to_fp32_cuda (dst_temp.get (), dst_ddf, ne_dst, main_stream);
1968+ }
1969+ }
1970+
1971+ static void ggml_cuda_mul_mat_batched_cublas (ggml_backend_cuda_context & ctx, const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
1972+ GGML_ASSERT (src0->type == GGML_TYPE_F16 || src0->type == GGML_TYPE_BF16 || src0->type == GGML_TYPE_F32);
1973+
1974+ switch (src0->type ) {
1975+ case GGML_TYPE_F32:
1976+ ggml_cuda_mul_mat_batched_cublas_impl<GGML_TYPE_F32>(ctx, src0, src1, dst);
1977+ break ;
1978+ case GGML_TYPE_BF16:
1979+ ggml_cuda_mul_mat_batched_cublas_impl<GGML_TYPE_BF16>(ctx, src0, src1, dst);
1980+ break ;
1981+ case GGML_TYPE_F16:
1982+ ggml_cuda_mul_mat_batched_cublas_impl<GGML_TYPE_F16>(ctx, src0, src1, dst);
1983+ break ;
1984+ default :
1985+ GGML_ABORT (" Unsupported type" );
19371986 }
19381987}
19391988
@@ -1985,6 +2034,12 @@ static void ggml_cuda_mul_mat(ggml_backend_cuda_context & ctx, const ggml_tensor
19852034 // printf("src0 is contiguous %d, transposed %d, type = %s, name = %s\n", ggml_is_contiguous(src0), ggml_is_transposed(src0), ggml_type_name(src0->type), src0->name);
19862035 // printf("src1 is contiguous %d, transposed %d, type = %s, name = %s\n", ggml_is_contiguous(src1), ggml_is_transposed(src1), ggml_type_name(src1->type), src1->name);
19872036
2037+ // TODO update for generic tensor parallelism
2038+ const int cc = ggml_cuda_info ().devices [ggml_cuda_get_device ()].cc ;
2039+ bool use_batched_cublas_f16 = src0->type == GGML_TYPE_F16 && (src1->type == GGML_TYPE_F16 || !any_gpus_with_slow_fp16);
2040+ bool use_batched_cublas_bf16 = src0->type == GGML_TYPE_BF16 && bf16_mma_hardware_available (cc);
2041+ bool use_batched_cublas_f32 = src0->type == GGML_TYPE_F32;
2042+
19882043 if (!split && use_mul_mat_vec) {
19892044 // the custom F16 vector kernel can be used over batched cuBLAS GEMM
19902045 // but this is only faster for GPUs without tensor cores or with a thin src0 matrix (particularly KQV in attention)
@@ -1993,8 +2048,8 @@ static void ggml_cuda_mul_mat(ggml_backend_cuda_context & ctx, const ggml_tensor
19932048 ggml_cuda_mul_mat_vec_q (ctx, src0, src1, nullptr , dst);
19942049 } else if (!split && use_mul_mat_q) {
19952050 ggml_cuda_mul_mat_q (ctx, src0, src1, nullptr , dst);
1996- } else if (!split && src0-> type == GGML_TYPE_F16 && (src1-> type == GGML_TYPE_F16 || !any_gpus_with_slow_fp16) &&
1997- !ggml_is_transposed (src0) && !ggml_is_transposed (src1) && src1->ne [2 ]*src1->ne [3 ] > 1 ) {
2051+ } else if (!split && (use_batched_cublas_f16 || use_batched_cublas_bf16 || use_batched_cublas_f32)
2052+ && !ggml_is_transposed (src0) && !ggml_is_transposed (src1) && src1->ne [2 ]*src1->ne [3 ] > 1 ) {
19982053 // general KQ + KQV multi-batch without FlashAttention
19992054 ggml_cuda_mul_mat_batched_cublas (ctx, src0, src1, dst);
20002055 } else if (use_mul_mat_vec) {
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