soc: nordic: nrf7120: Update wifi for ns build

Update Wi-FI setup for non secure build,
In nrf7120pdk/nrf7120/cpuapp build, mpc and spu configuration
are done in soc.c.
In nrf7120pdk/nrf7120/cpuapp/ns build, mpc and spu configuration
are done target_cfg_71.c(Secure processing environment).

Signed-off-by: Travis Lam <[email protected]>

Author: travis3630

soc/nordic/nrf71/Kconfig

@@ -50,9 +50,4 @@ config NRF_TRUSTZONE_RAM_REGION_SIZE
 	  This abstraction allows us to configure TRUSTZONE without depending
 	  on peripheral specific symbols.
 
-# TODO: Remove this option once all pre-ENG variants support AMBIX03
-config SOC_NRF7120_HAS_AMBIX03
-	bool "AMBIX03 available"
-	depends on SOC_NRF7120_PREENG
-
 endif # SOC_SERIES_NRF71X

soc/nordic/nrf71/soc.c

@@ -38,12 +38,8 @@
 
 LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
 
-static inline void write_reg32(uintptr_t addr, uint32_t value)
-{
-	*((volatile uint32_t *)addr) = value;
-}
-
-/* Copied from TF-M implementation */
+#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
+/* Copied from TF-M native driver */
 struct mpc_region_override {
 	nrf_mpc_override_config_t config;
 	nrf_owner_t owner_id;
@@ -111,6 +107,7 @@ static inline NRF_SPU_Type *spu_instance_from_peripheral_addr(uint32_t periphera
 	return (NRF_SPU_Type *)(0x50000000 | apb_bus_number);
 }
 
+#ifdef CONFIG_BOARD_NRF7120PDK_NRF7120_CPUAPP_EMU
 static void spu_peripheral_config_non_secure(const uint32_t periph_base_address, bool periph_lock)
 {
 	uint8_t periph_id = NRFX_PERIPHERAL_ID_GET(periph_base_address);
@@ -135,56 +132,55 @@ static void spu_peripheral_config_non_secure(const uint32_t periph_base_address,
 	nrf_spu_periph_perm_lock_enable(nrf_spu, index);
 #endif
 }
+#endif /* CONFIG_BOARD_NRF7120PDK_NRF7120_CPUAPP_EMU */
+/* End of TF-M native driver */
 
-#define MPC00_OVERRIDE_COUNT 7
-static uint32_t get_mpc00_override_next_index(void)
-{
-	static uint32_t index;
-
-	NRFX_ASSERT(index < MPC00_OVERRIDE_COUNT);
-	return index++;
-}
-
-#ifdef CONFIG_SOC_NRF7120_HAS_AMBIX03
-#define MPC03_OVERRIDE_COUNT 4
-static uint32_t get_mpc03_override_next_index(void)
-{
-	static uint32_t index;
-
-	NRFX_ASSERT(index < MPC03_OVERRIDE_COUNT);
-	return index++;
-}
-#endif /* CONFIG_SOC_NRF7120_HAS_AMBIX03 */
-
-static void wifi_setup(void)
+void wifi_mpc_configuration(void)
 {
 	struct mpc_region_override override;
+	uint32_t index = 0;
 
 	/* Make RAM_00/01/02 (AMBIX00 + AMBIX03) accessible to the Wi-Fi domain*/
 	init_mpc_region_override(&override);
 	override.start_address = 0x20000000;
 	override.endaddr = 0x200E0000;
-	override.index = get_mpc00_override_next_index();
+	override.index = index++;
 	mpc_configure_override(NRF_MPC00, &override);
 
 	/* MRAM MPC overrides for wifi */
 	init_mpc_region_override(&override);
 	override.start_address = 0x00000000;
 	override.endaddr = 0x01000000;
-	override.index = get_mpc00_override_next_index();
+	override.index = index++;
 	mpc_configure_override(NRF_MPC00, &override);
 
-#ifdef CONFIG_SOC_NRF7120_HAS_AMBIX03
 	/* Make RAM_02 (AMBIX03) accessible to the Wi-Fi domain for IPC */
 	init_mpc_region_override(&override);
 	override.start_address = 0x200C0000;
 	override.endaddr = 0x200E0000;
-	override.index = get_mpc03_override_next_index();
+	override.index = 0;
 	mpc_configure_override(NRF_MPC03, &override);
-#endif /* CONFIG_SOC_NRF7120_HAS_AMBIX03 */
+}
 
-	/* Make GRTC accessible from the WIFI-Core */
-	spu_peripheral_config_non_secure(NRF_GRTC_S_BASE, true);
+void grtc_configuration(void)
+{
+	/* Split security configuration to let Wi-Fi access GRTC */
+	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_CC, 15, 0, 0);
+	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_CC, 14, 0, 0);
+	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_INTERRUPT, 4, 0, 0);
+	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_INTERRUPT, 5, 0, 0);
+	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_SYSCOUNTER, 0, 0, 0);
+}
+#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE */
+
+#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(__NRF_TFM__)
+void wifi_setup(void)
+{
+#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
+	/* Skip for tf-m, configuration exist in target_cfg_71.c */
+	wifi_mpc_configuration();
+
+	grtc_configuration();
 
 	/* EMU platform uses UART 20 for the Wi-Fi console */
 #ifdef CONFIG_BOARD_NRF7120PDK_NRF7120_CPUAPP_EMU
@@ -196,21 +192,16 @@ static void wifi_setup(void)
 	/* Set permission for TXD */
 	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GPIO_PIN, 1, 4,
 				    SPU_FEATURE_GPIO_PIN_SECATTR_NonSecure);
-#endif /* CONFIG_BOARD_NRF7120PDK_NRF7120_CPUAPP_EMU */
-
-	/* Split security configuration to let Wi-Fi access GRTC */
-	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_CC, 15, 0, 0);
-	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_CC, 14, 0, 0);
-	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_INTERRUPT, 4, 0, 0);
-	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_INTERRUPT, 5, 0, 0);
-	nrf_spu_feature_secattr_set(NRF_SPU20, NRF_SPU_FEATURE_GRTC_SYSCOUNTER, 0, 0, 0);
+#endif
+#endif
 
 	/* Kickstart the LMAC processor */
 	NRF_WIFICORE_LRCCONF_LRC0->POWERON =
 		(LRCCONF_POWERON_MAIN_AlwaysOn << LRCCONF_POWERON_MAIN_Pos);
 	NRF_WIFICORE_LMAC_VPR->INITPC = NRF_WICR->RESERVED[0];
 	NRF_WIFICORE_LMAC_VPR->CPURUN = (VPR_CPURUN_EN_Running << VPR_CPURUN_EN_Pos);
 }
+#endif
 
 void soc_early_init_hook(void)
 {
@@ -220,18 +211,18 @@ void soc_early_init_hook(void)
 #if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(__NRF_TFM__)
 	/* Currently not supported for non-secure */
 	SystemCoreClockUpdate();
+	wifi_setup();
 #endif
 
 #ifdef __NRF_TFM__
-	/* TF-M enables the instruction cache from target_cfg.c, so we
+	/* TF-M enables the instruction cache from target_cfg_71.c, so we
 	 * don't need to enable it here.
 	 */
 #else
 	/* Enable ICACHE */
 	sys_cache_instr_enable();
 #endif
 
-	wifi_setup();
 }
 
 void arch_busy_wait(uint32_t time_us)