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tests: drivers: audio: pdm_loopback: Check PDM state after stop start
Add test that detects issue described in DLT-3748. Check that PDM configuration is not lost by stopping and then starting PDM interface. Signed-off-by: Sebastian Głąb <[email protected]>
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tests/drivers/audio/pdm_loopback/src/main.c

Lines changed: 21 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -249,10 +249,10 @@ ZTEST(pdm_loopback, test_pdm_clk_frequency)
249249
{
250250
int ret;
251251
uint8_t gpiote_channel;
252-
nrfx_gpiote_t *gpiote_instance =
253-
&GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE(DT_NODELABEL(pulse_counter), gpios));
252+
nrfx_gpiote_t gpiote_instance =
253+
GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE(DT_NODELABEL(pulse_counter), gpios));
254254

255-
ret = nrfx_gpiote_channel_alloc(gpiote_instance, &gpiote_channel);
255+
ret = nrfx_gpiote_channel_alloc(&gpiote_instance, &gpiote_channel);
256256
zassert_true(ret == 0, "GPIOTE channel allocation failed, return code = %d", ret);
257257

258258
nrfx_gpiote_trigger_config_t trigger_cfg = {
@@ -267,10 +267,10 @@ ZTEST(pdm_loopback, test_pdm_clk_frequency)
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.p_trigger_config = &trigger_cfg,
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};
269269

270-
ret = nrfx_gpiote_input_configure(gpiote_instance, CLOCK_INPUT_PIN, &gpiote_cfg);
270+
ret = nrfx_gpiote_input_configure(&gpiote_instance, CLOCK_INPUT_PIN, &gpiote_cfg);
271271
zassert_true(ret == 0, "GPIOTE input configuration failed, return code = %d", ret);
272272

273-
nrfx_gpiote_trigger_enable(gpiote_instance, CLOCK_INPUT_PIN, false);
273+
nrfx_gpiote_trigger_enable(&gpiote_instance, CLOCK_INPUT_PIN, false);
274274

275275
nrfx_timer_config_t timer_config = NRFX_TIMER_DEFAULT_CONFIG(
276276
NRFX_TIMER_BASE_FREQUENCY_GET(&timer_instance));
@@ -284,7 +284,7 @@ ZTEST(pdm_loopback, test_pdm_clk_frequency)
284284
nrfx_timer_enable(&timer_instance);
285285

286286
nrfx_gppi_handle_t gppi_handle;
287-
uint32_t eep = nrfx_gpiote_in_event_address_get(gpiote_instance, CLOCK_INPUT_PIN);
287+
uint32_t eep = nrfx_gpiote_in_event_address_get(&gpiote_instance, CLOCK_INPUT_PIN);
288288
uint32_t tep = nrfx_timer_task_address_get(&timer_instance, NRF_TIMER_TASK_COUNT);
289289

290290
ret = nrfx_gppi_conn_alloc(eep, tep, &gppi_handle);
@@ -300,6 +300,21 @@ ZTEST(pdm_loopback, test_pdm_clk_frequency)
300300
PDM_EXPECTED_FREQ * SAMPLING_RATIO / 30,
301301
"Captured incorrect frequency Hz. Captured pulses = %lu, expected = %lu",
302302
pulses, PDM_EXPECTED_FREQ * SAMPLING_RATIO);
303+
304+
/* Remove GPPI configuration. */
305+
nrfx_gppi_conn_disable(gppi_handle);
306+
nrfx_gppi_conn_free(eep, tep, gppi_handle);
307+
308+
/* Remove GPIOTE configuration. */
309+
ret = nrfx_gpiote_pin_uninit(&gpiote_instance, CLOCK_INPUT_PIN);
310+
zexpect_true(ret == 0, "nrfx_gpiote_pin_uninit() ret %d", ret);
311+
nrfx_gpiote_trigger_disable(&gpiote_instance, CLOCK_INPUT_PIN);
312+
ret = nrfx_gpiote_channel_free(&gpiote_instance, gpiote_channel);
313+
zexpect_true(ret == 0, "nrfx_gpiote_channel_free() ret %d", ret);
314+
315+
/* Remove NRFX Timer configuration. */
316+
nrfx_timer_disable(&timer_instance);
317+
nrfx_timer_uninit(&timer_instance);
303318
}
304319

305320
ZTEST_SUITE(pdm_loopback, NULL, device_setup, setup, teardown, NULL);
Lines changed: 12 additions & 0 deletions
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@@ -0,0 +1,12 @@
1+
#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(pdm_prescaler)
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target_sources(app PRIVATE src/main.c)
Lines changed: 28 additions & 0 deletions
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@@ -0,0 +1,28 @@
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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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source "Kconfig.zephyr"
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9+
config TEST_PDM_SAMPLING_RATE
10+
int "PDM sample rate in Hz"
11+
default 10000
12+
help
13+
The test will use it to define frequency of PDM sampling and
14+
calculate the size of the buffer.
15+
16+
config TEST_PDM_EXPECTED_FREQUENCY
17+
int "Expected PDM_CLK frequency in Hz"
18+
default 1000000
19+
help
20+
The test will use it to confirm that the captured PDM_CLK
21+
frequency in correct.
22+
23+
config TEST_PDM_SAMPLING_TIME
24+
int "PDM sampling time for one block in ms"
25+
default 100
26+
help
27+
The test will use it to calculate the size of data block and
28+
determine the period of capturing timer.
Lines changed: 39 additions & 0 deletions
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@@ -0,0 +1,39 @@
1+
/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
6+
7+
/ {
8+
gpio_test {
9+
compatible = "gpio-leds";
10+
11+
pulse_counter: pulse_counter {
12+
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
13+
};
14+
};
15+
};
16+
17+
&pinctrl {
18+
pdm20_default_alt: pdm20_default_alt {
19+
group1 {
20+
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
21+
<NRF_PSEL(PDM_DIN, 1, 12)>;
22+
};
23+
};
24+
};
25+
26+
pdm_dev: &pdm20 {
27+
status = "okay";
28+
pinctrl-0 = <&pdm20_default_alt>;
29+
pinctrl-names = "default";
30+
clock-source = "PCLK32M";
31+
};
32+
33+
&gpio1 {
34+
status = "okay";
35+
};
36+
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&timer00 {
38+
status = "okay";
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};
Lines changed: 39 additions & 0 deletions
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1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
6+
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/ {
8+
gpio_test {
9+
compatible = "gpio-leds";
10+
11+
pulse_counter: pulse_counter {
12+
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
13+
};
14+
};
15+
};
16+
17+
&pinctrl {
18+
pdm20_default_alt: pdm20_default_alt {
19+
group1 {
20+
psels = <NRF_PSEL(PDM_CLK, 1, 10)>,
21+
<NRF_PSEL(PDM_DIN, 1, 12)>;
22+
};
23+
};
24+
};
25+
26+
pdm_dev: &pdm20 {
27+
status = "okay";
28+
pinctrl-0 = <&pdm20_default_alt>;
29+
pinctrl-names = "default";
30+
clock-source = "PCLK32M";
31+
};
32+
33+
&gpio1 {
34+
status = "okay";
35+
};
36+
37+
&timer00 {
38+
status = "okay";
39+
};
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@@ -0,0 +1,43 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
/* Test requires loopback between P1.23 and P1.24.
8+
* For best performance, PDM_CLK shall be on 'Clock pin'.
9+
*/
10+
11+
/ {
12+
gpio_test {
13+
compatible = "gpio-leds";
14+
15+
pulse_counter: pulse_counter {
16+
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
17+
};
18+
};
19+
};
20+
21+
&pinctrl {
22+
pdm20_default_alt: pdm20_default_alt {
23+
group1 {
24+
psels = <NRF_PSEL(PDM_CLK, 1, 23)>,
25+
<NRF_PSEL(PDM_DIN, 1, 0)>;
26+
};
27+
};
28+
};
29+
30+
pdm_dev: &pdm20 {
31+
status = "okay";
32+
pinctrl-0 = <&pdm20_default_alt>;
33+
pinctrl-names = "default";
34+
clock-source = "PCLK32M";
35+
};
36+
37+
&gpio1 {
38+
status = "okay";
39+
};
40+
41+
&timer00 {
42+
status = "okay";
43+
};
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1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
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*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
&pdm_dev {
8+
clock-source = "ACLK";
9+
};
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@@ -0,0 +1,14 @@
1+
#
2+
# Copyright (c) 2025 Nordic Semiconductor ASA
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#
4+
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
#
6+
7+
CONFIG_ZTEST=y
8+
CONFIG_TEST_USERSPACE=y
9+
10+
CONFIG_AUDIO=y
11+
CONFIG_AUDIO_DMIC=y
12+
CONFIG_GPIO=y
13+
CONFIG_NRFX_GPPI=y
14+
CONFIG_NRFX_TIMER=y

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