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[AArch64] Add asssembly/disassembly for FMOP4{A,S} (widening, 2-way, FP16 to FP32) instructions (llvm#113346)
The new instructions are described in https://developer.arm.com/documentation/ddi0602/2024-09/SME-Instructions
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‎llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td‎

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@@ -1020,6 +1020,9 @@ let Predicates = [HasSME2p2] in {
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defm FMOP4A : sme2_fmop4as_fp32_non_widening<0, "fmop4a">;
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defm FMOP4S : sme2_fmop4as_fp32_non_widening<1, "fmop4s">;
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defm FMOP4A : sme2_fmop4as_fp16_fp32_widening<0, "fmop4a">;
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defm FMOP4S : sme2_fmop4as_fp16_fp32_widening<1, "fmop4s">;
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} // [HasSME2p2]
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let Predicates = [HasSME2p2, HasSMEB16B16] in {

‎llvm/lib/Target/AArch64/SMEInstrFormats.td‎

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@@ -5528,3 +5528,40 @@ multiclass sme2_fmop4as_fp64_non_widening<bit S, string mnemonic> {
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// Multiple vectors
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def _M2Z2Z_D : sme2_fp64_quarter_tile_outer_product<1, 1, S, mnemonic, ZZ_d_mul_r_Lo, ZZ_d_mul_r_Hi>;
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}
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class sme2_fp16_fp32_quarter_tile_outer_product<bit M, bit N, bit S, string mnemonic, RegisterOperand zn_ty, RegisterOperand zm_ty>
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: I<(outs TileOp32:$ZAda),
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(ins TileOp32:$_ZAda, zn_ty:$Zn, zm_ty:$Zm),
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mnemonic, "\t$ZAda, $Zn, $Zm",
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"", []>, Sched<[]> {
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bits<2> ZAda;
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bits<3> Zn;
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bits<3> Zm;
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let Inst{31-21} = 0b10000001001;
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let Inst{20} = M;
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let Inst{19-17} = Zm;
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let Inst{16-10} = 0b0000000;
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let Inst{9} = N;
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let Inst{8-6} = Zn;
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let Inst{5} = 0;
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let Inst{4} = S;
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let Inst{3-2} = 0b00;
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let Inst{1-0} = ZAda;
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let Constraints = "$ZAda = $_ZAda";
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}
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multiclass sme2_fmop4as_fp16_fp32_widening<bit S, string mnemonic> {
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// Single vectors
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def _MZZ_HtoS : sme2_fp16_fp32_quarter_tile_outer_product<0, 0, S, mnemonic, ZPR16Mul2_Lo, ZPR16Mul2_Hi>;
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// Multiple and single vectors
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def _M2ZZ_HtoS : sme2_fp16_fp32_quarter_tile_outer_product<0, 1, S, mnemonic, ZZ_h_mul_r_Lo, ZPR16Mul2_Hi>;
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// Single and multiple vectors
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def _MZ2Z_HtoS : sme2_fp16_fp32_quarter_tile_outer_product<1, 0, S, mnemonic, ZPR16Mul2_Lo, ZZ_h_mul_r_Hi>;
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// Multiple vectors
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def _M2Z2Z_HtoS : sme2_fp16_fp32_quarter_tile_outer_product<1, 1, S, mnemonic, ZZ_h_mul_r_Lo, ZZ_h_mul_r_Hi>;
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}

‎llvm/test/MC/AArch64/SME2p2/fmop4as-fp16-fp32-widening-diagnostics.s‎

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// RUN: not llvm-mc -triple=aarch64 -mattr=+sme2p2 < %s 2>&1 | FileCheck %s
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// FMOP4A
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// Single vectors
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fmop4a za0.d, z0.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4a za4.s, z0.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, z0.d, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z15.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z16.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z0.h, z16.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4a za0.s, z12.h, z17.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4a za0.s, z12.h, z14.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4a za0.s, z12.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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// Single and multiple vectors
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fmop4a za0.d, z0.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4a za4.s, z0.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, z0.d, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z1.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z16.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4a za0.s, z0.h, {z16.d-z17.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, z0.h, {z17.h-z18.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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fmop4a za0.s, z0.h, {z16.h-z18.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, z0.h, {z12.h-z13.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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// Multiple and single vectors
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fmop4a za0.d, {z0.h-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4a za4.s, {z0.h-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z0.d-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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fmop4a za0.s, {z1.h-z2.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4a za4.s, {z0.h-z2.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z16.h-z17.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4a za0.s, {z0.h-z1.h}, z16.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4a za0.s, {z0.h-z1.h}, z17.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4a za0.s, {z0.h-z1.h}, z12.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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// Multiple vectors
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fmop4a za0.d, {z0.h-z1.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4a za4.s, {z0.h-z1.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z0.d-z1.d}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z1.h-z2.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4a za0.s, {z0.h-z2.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z18.h-z19.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4a za0.s, {z0.h-z1.h}, {z16.d-z17.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z0.h-z1.h}, {z19.h-z20.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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fmop4a za0.s, {z0.h-z1.h}, {z18.h-z20.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4a za0.s, {z0.h-z1.h}, {z10.h-z11.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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// FMOP4S
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// Single vectors
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fmop4a za0.d, z0.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4s za4.s, z0.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, z0.d, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z15.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z16.h, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z0.h, z16.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4s za0.s, z12.h, z17.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4s za0.s, z12.h, z14.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4s za0.s, z12.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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// Single and multiple vectors
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fmop4s za0.d, z0.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4s za4.s, z0.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, z0.d, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z1.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z16.h, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register
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fmop4s za0.s, z0.h, {z16.d-z17.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, z0.h, {z17.h-z18.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, z0.h, {z16.h-z18.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, z0.h, {z12.h-z13.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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// Multiple and single vectors
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fmop4s za0.d, {z0.h-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4s za4.s, {z0.h-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z0.d-z1.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
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fmop4s za0.s, {z1.h-z2.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, {z0.h-z2.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z16.h-z17.h}, z16.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, {z0.h-z1.h}, z16.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4s za0.s, {z0.h-z1.h}, z17.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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fmop4s za0.s, {z0.h-z1.h}, z12.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
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// Multiple vectors
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fmop4s za0.d, {z0.h-z1.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
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fmop4s za4.s, {z0.h-z1.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z0.d-z1.d}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z1.h-z2.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, {z0.h-z2.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z18.h-z19.h}, {z16.h-z17.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, {z0.h-z1.h}, {z16.d-z17.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z0.h-z1.h}, {z19.h-z20.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
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fmop4s za0.s, {z0.h-z1.h}, {z18.h-z20.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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fmop4s za0.s, {z0.h-z1.h}, {z10.h-z11.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types

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