NMSIS/DSP: add rvv fp32/fp16 math function(exp,logf,sin,cos,pow,tanh, etc.)

shuzhuo · shuzhuo · commit 68cef1a7972e · 2025-12-23T19:17:15.000+08:00
diff --git a/NMSIS/DSP/Include/riscv_helium_utils.h b/NMSIS/DSP/Include/riscv_helium_utils.h
diff --git a/NMSIS/DSP/Include/riscv_math.h b/NMSIS/DSP/Include/riscv_math.h
@@ -139,6 +139,9 @@
 #include "riscv_math_f16.h"
 #endif /* defined (RISCV_FLOAT16_SUPPORTED) */
 
+#if defined(RISCV_MATH_VECTOR)
+#include "riscv_vec_math.h"
+#endif /* defined(RISCV_MATH_VECTOR) */
 
 
 #ifdef   __cplusplus
diff --git a/NMSIS/DSP/Include/riscv_vec_math.h b/NMSIS/DSP/Include/riscv_vec_math.h
diff --git a/NMSIS/DSP/Include/riscv_vec_math_f16.h b/NMSIS/DSP/Include/riscv_vec_math_f16.h
diff --git a/NMSIS/DSP/PrivateInclude/riscv_vec_fft.h b/NMSIS/DSP/PrivateInclude/riscv_vec_fft.h
@@ -27,7 +27,6 @@
 #define _RISCV_VEC_FFT_H_
 
 #include "riscv_math.h"
-#include "riscv_helium_utils.h"
 
 #ifdef   __cplusplus
 extern "C"
diff --git a/NMSIS/DSP/PrivateInclude/riscv_vec_filtering.h b/NMSIS/DSP/PrivateInclude/riscv_vec_filtering.h
@@ -27,7 +27,6 @@
 #define _RISCV_VEC_FILTERING_H_
 
 #include "riscv_math.h"
-#include "riscv_helium_utils.h"
 
 #ifdef   __cplusplus
 extern "C"
diff --git a/NMSIS/DSP/Source/FastMathFunctions/riscv_vexp_f16.c b/NMSIS/DSP/Source/FastMathFunctions/riscv_vexp_f16.c
@@ -33,7 +33,9 @@
 
 #include "riscv_common_tables.h"
 
+#if defined(RISCV_MATH_VECTOR)
 #include "riscv_vec_math_f16.h"
+#endif /* defined(RISCV_MATH_VECTOR) */
 
 /**
   @addtogroup vexp
@@ -53,6 +55,18 @@ RISCV_DSP_ATTRIBUTE void riscv_vexp_f16(
 {
    uint32_t blkCnt; 
 
+#if defined(RISCV_MATH_VECTOR)
+   size_t l;
+   blkCnt = blockSize;
+   vfloat16m8_t vx, vy;
+   for (; (l = __riscv_vsetvl_e16m8(blkCnt)) > 0; blkCnt -= l) {
+     vx = __riscv_vle16_v_f16m8(pSrc, l);
+     pSrc += l;
+     vy = exp_ps_f16_m8(vx, l);
+     __riscv_vse16_v_f16m8(pDst, vy, l);
+     pDst += l;
+   }
+#else
    blkCnt = blockSize;
 
    while (blkCnt > 0U)
@@ -65,10 +79,11 @@ RISCV_DSP_ATTRIBUTE void riscv_vexp_f16(
       /* Decrement loop counter */
       blkCnt--;
    }
+#endif /* defined(RISCV_MATH_VECTOR) */
 }
 
 #endif /* #if defined(RISCV_FLOAT16_SUPPORTED) */ 
 
 /**
   @} end of vexp group
- */
+ */
diff --git a/NMSIS/DSP/Source/FastMathFunctions/riscv_vexp_f32.c b/NMSIS/DSP/Source/FastMathFunctions/riscv_vexp_f32.c
@@ -30,6 +30,9 @@
 #include "dsp/fast_math_functions.h"
 #include "riscv_common_tables.h"
 
+#if defined(RISCV_MATH_VECTOR)
+#include "riscv_vec_math.h"
+#endif /* defined(RISCV_MATH_VECTOR) */
 
 /**
   @ingroup groupFastMath
@@ -59,6 +62,18 @@ RISCV_DSP_ATTRIBUTE void riscv_vexp_f32(
 {
    uint32_t blkCnt; 
 
+#if defined(RISCV_MATH_VECTOR)
+   size_t l;
+   blkCnt = blockSize;
+   vfloat32m8_t vx, vy;
+   for (; (l = __riscv_vsetvl_e32m8(blkCnt)) > 0; blkCnt -= l) {
+     vx = __riscv_vle32_v_f32m8(pSrc, l);
+     pSrc += l;
+     vy = exp_ps_m8(vx, l);
+     __riscv_vse32_v_f32m8(pDst, vy, l);
+     pDst += l;
+   }
+#else
    blkCnt = blockSize;
 
    while (blkCnt > 0U)
@@ -71,8 +86,9 @@ RISCV_DSP_ATTRIBUTE void riscv_vexp_f32(
       /* Decrement loop counter */
       blkCnt--;
    }
+#endif /* defined(RISCV_MATH_VECTOR) */
 }
 
 /**
   @} end of vexp group
- */
+ */
diff --git a/NMSIS/DSP/Source/FastMathFunctions/riscv_vlog_f16.c b/NMSIS/DSP/Source/FastMathFunctions/riscv_vlog_f16.c
@@ -32,6 +32,11 @@
 
 #if defined(RISCV_FLOAT16_SUPPORTED)
 
+#if defined(RISCV_MATH_VECTOR)
+#include "riscv_vec_math_f16.h"
+#endif /* defined(RISCV_MATH_VECTOR) */
+
+
 /* Degree of the polynomial approximation */
 #define NB_DEG_LOGF16 3
 
@@ -128,6 +133,18 @@ RISCV_DSP_ATTRIBUTE void riscv_vlog_f16(
 {
    uint32_t blkCnt;
 
+#if defined(RISCV_MATH_VECTOR)
+   size_t l;
+   blkCnt = blockSize;
+   vfloat16m8_t vx, vy;
+   for (; (l = __riscv_vsetvl_e16m8(blkCnt)) > 0; blkCnt -= l) {
+     vx = __riscv_vle16_v_f16m8(pSrc, l);
+     pSrc += l;
+     vy = log_ps_f16_m8(vx, l);
+     __riscv_vse16_v_f16m8(pDst, vy, l);
+     pDst += l;
+   }
+#else
    blkCnt = blockSize;
 
    while (blkCnt > 0U)
@@ -140,6 +157,7 @@ RISCV_DSP_ATTRIBUTE void riscv_vlog_f16(
       /* Decrement loop counter */
       blkCnt--;
    }
+#endif /* defined(RISCV_MATH_VECTOR) */
 }
 
 
diff --git a/NMSIS/DSP/Source/FastMathFunctions/riscv_vlog_f32.c b/NMSIS/DSP/Source/FastMathFunctions/riscv_vlog_f32.c
@@ -30,7 +30,11 @@
 #include "dsp/fast_math_functions.h"
 #include "riscv_common_tables.h"
 
+#if defined(RISCV_MATH_VECTOR)
+#include "riscv_vec_math.h"
+#endif /* defined(RISCV_MATH_VECTOR) */
 
+#include <stdio.h>
 /**
   @ingroup groupFastMath
  */
@@ -54,8 +58,20 @@ RISCV_DSP_ATTRIBUTE void riscv_vlog_f32(
         float32_t * pDst,
         uint32_t blockSize)
 {
-   uint32_t blkCnt; 
+   uint32_t blkCnt;
 
+#if defined(RISCV_MATH_VECTOR)
+   size_t l;
+   blkCnt = blockSize;
+   vfloat32m8_t vx, vy;
+   for (; (l = __riscv_vsetvl_e32m8(blkCnt)) > 0; blkCnt -= l) {
+     vx = __riscv_vle32_v_f32m8(pSrc, l);
+     pSrc += l;
+     vy = log_ps_m8(vx, l);
+     __riscv_vse32_v_f32m8(pDst, vy, l);
+     pDst += l;
+   }
+#else
    blkCnt = blockSize;
 
    while (blkCnt > 0U)
@@ -68,6 +84,7 @@ RISCV_DSP_ATTRIBUTE void riscv_vlog_f32(
       /* Decrement loop counter */
       blkCnt--;
    }
+#endif /* defined(RISCV_MATH_VECTOR) */
 }
 
 /**
diff --git a/NMSIS/DSP/Source/QuaternionMathFunctions/riscv_quaternion_product_f32.c b/NMSIS/DSP/Source/QuaternionMathFunctions/riscv_quaternion_product_f32.c
@@ -63,9 +63,6 @@
   @param[in]     nbQuaternions       number of quaternions in the array
  */
 
-
-#include "riscv_helium_utils.h"
-
 RISCV_DSP_ATTRIBUTE void riscv_quaternion_product_f32(const float32_t *qa, 
     const float32_t *qb, 
     float32_t *qr,
diff --git a/NMSIS/DSP/Test/FastMathFunctions/ref_riscv_fast_math.c b/NMSIS/DSP/Test/FastMathFunctions/ref_riscv_fast_math.c
@@ -233,6 +233,50 @@ void ref_vlog_f32(
    }
 }
 
+#if defined(RISCV_FLOAT16_SUPPORTED)
+void ref_vexp_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt;
+
+   blkCnt = blockSize;
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = expf((float32_t)(*pSrc++));
+
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+
+void ref_vlog_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt;
+
+   blkCnt = blockSize;
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = logf((float32_t)(*pSrc++));
+
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+#endif
+
 float32_t ref_sin_f32(
   float32_t x)
 {
@@ -455,4 +499,4 @@ q15_t ref_cos_q15(q15_t x)
 
   /* Return output value */
   return (cosVal << 1);
-}
+}
diff --git a/NMSIS/DSP/Test/FastMathFunctions/riscv_fast_math.c b/NMSIS/DSP/Test/FastMathFunctions/riscv_fast_math.c
@@ -24,6 +24,11 @@ q31_t q31_pIN[BLOCK_TESTSZ];
 q15_t q15_pOUT[BLOCK_TESTSZ], q15_pOUT_ref[BLOCK_TESTSZ];
 q15_t q15_pIN1[BLOCK_TESTSZ], q15_pIN2[BLOCK_TESTSZ];
 
+#if defined (RISCV_FLOAT16_SUPPORTED)
+float16_t f16_pOUT[BLOCK_TESTSZ], f16_pOUT_ref[BLOCK_TESTSZ];
+float16_t f16_pIN[BLOCK_TESTSZ];
+#endif /* defined (RISCV_FLOAT16_SUPPORTED) */
+
 int test_flag_error = 0;
 int8_t s;
 BENCH_DECLARE_VAR();
@@ -116,6 +121,19 @@ static int DSP_EXP(void)
         test_flag_error = 1;
     }
     BENCH_STATUS(riscv_vexp_f32);
+
+#if defined (RISCV_FLOAT16_SUPPORTED)
+    BENCH_START(riscv_vexp_f16);
+    riscv_vexp_f16(f16_pIN, f16_pOUT, BLOCK_TESTSZ);
+    BENCH_END(riscv_vexp_f16);
+    ref_vexp_f16(f16_pIN, f16_pOUT_ref, BLOCK_TESTSZ);
+    s = verify_results_f16(f16_pOUT_ref, f16_pOUT, BLOCK_TESTSZ);
+    if (s != 0) {
+        BENCH_ERROR(riscv_vexp_f16);
+        test_flag_error = 1;
+    }
+    BENCH_STATUS(riscv_vexp_f16);
+#endif
 }
 
 static int DSP_LOG(void)
@@ -130,6 +148,19 @@ static int DSP_LOG(void)
         test_flag_error = 1;
     }
     BENCH_STATUS(riscv_vlog_f32);
+
+#if defined (RISCV_FLOAT16_SUPPORTED)
+    BENCH_START(riscv_vlog_f16);
+    riscv_vlog_f16(f16_pIN, f16_pOUT, BLOCK_TESTSZ);
+    BENCH_END(riscv_vlog_f16);
+    ref_vlog_f16(f16_pIN, f16_pOUT_ref, BLOCK_TESTSZ);
+    s = verify_results_f16(f16_pOUT_ref, f16_pOUT, BLOCK_TESTSZ);
+    if (s != 0) {
+        BENCH_ERROR(riscv_vlog_f16);
+        test_flag_error = 1;
+    }
+    BENCH_STATUS(riscv_vlog_f16);
+#endif
 }
 
 static int DSP_COS(void)
@@ -244,7 +275,11 @@ int main(void)
     generate_rand_q15(q15_pIN1, BLOCK_TESTSZ);
     generate_rand_q15(q15_pIN2, BLOCK_TESTSZ);
     generate_rand_q31(q31_pIN, BLOCK_TESTSZ);
-    generate_rand_f32(f32_pIN, BLOCK_TESTSZ);
+    generate_rand_f32_limit(f32_pIN, BLOCK_TESTSZ, 0.1f, 10.0f);
+
+#if defined (RISCV_FLOAT16_SUPPORTED)
+    generate_rand_f16_limit(f16_pIN, BLOCK_TESTSZ, 0.1f, 2.0f);
+#endif
 
     DSP_SQRT();
     DSP_DIVIDE();
diff --git a/NMSIS/DSP/Test/common.h b/NMSIS/DSP/Test/common.h
