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conf/genconf: Fix the incorrect of 64-bit addresses.
Signed-off-by: guibing <guibing@nucleisys.com>
1 parent 9eaf835 commit 43364ea

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+64
-30
lines changed

1 file changed

+64
-30
lines changed

conf/genconf.py

Lines changed: 64 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -510,58 +510,92 @@ def update_openocd_config(file_path, **kwargs):
510510
update_dts_clk_freq(dts_file, 'CPUCLK_FREQ', board_cpu_freq)
511511

512512
# update memory dts node
513-
ddr_base_hex = hex(int(board_ddr_base, 16))
514-
ddr_size_hex = hex(int(board_ddr_size, 16) - reserve_ampmem)
515-
memory_reg_val = f"0x0 0x{ddr_base_hex.lstrip('0x')} 0x0 0x{ddr_size_hex.lstrip('0x')}"
516-
update_dts_node(dts_file, 'memory', ddr_base_hex.lstrip('0x'), memory_reg_val)
513+
ddr_base_int = int(board_ddr_base, 16)
514+
ddr_base_int_high = (ddr_base_int >> 32) & 0xFFFFFFFF
515+
ddr_base_int_low = ddr_base_int & 0xFFFFFFFF
516+
ddr_size_int = int(board_ddr_size, 16) - reserve_ampmem
517+
ddr_size_int_high = (ddr_size_int >> 32) & 0xFFFFFFFF
518+
ddr_size_int_low = ddr_size_int & 0xFFFFFFFF
519+
memory_reg_val = f"0x{ddr_base_int_high:x} 0x{ddr_base_int_low:x} 0x{ddr_size_int_high:x} 0x{ddr_size_int_low:x}"
520+
update_dts_node(dts_file, 'memory', format(ddr_base_int, 'x'), memory_reg_val)
517521

518522
if board_iregion_base is not None:
519523
# update plic dts node
520-
plic_base_hex = hex(int(board_iregion_base, 16) + 0x4000000)
521-
plic_size_hex = hex(0x4000000)
522-
plic_reg_val = f"0x0 0x{plic_base_hex.lstrip('0x')} 0x0 0x{plic_size_hex.lstrip('0x')}"
523-
update_dts_node(dts_file, 'interrupt-controller', plic_base_hex.lstrip('0x'), plic_reg_val)
524+
plic_base_int = int(board_iregion_base, 16) + 0x4000000
525+
plic_base_int_high = (plic_base_int >> 32) & 0xFFFFFFFF
526+
plic_base_int_low = plic_base_int & 0xFFFFFFFF
527+
plic_size_int = 0x4000000
528+
plic_size_int_high = (plic_size_int >> 32) & 0xFFFFFFFF
529+
plic_size_int_low = plic_size_int & 0xFFFFFFFF
530+
plic_reg_val = f"0x{plic_base_int_high:x} 0x{plic_base_int_low:x} 0x{plic_size_int_high:x} 0x{plic_size_int_low:x}"
531+
update_dts_node(dts_file, 'interrupt-controller', format(plic_base_int, 'x'), plic_reg_val)
524532

525533
# update clint dts node
526-
clint_base_hex = hex(int(board_iregion_base, 16) + 0x31000)
527-
clint_size_hex = hex(0xC000)
528-
clint_reg_val = f"0x0 0x{clint_base_hex.lstrip('0x')} 0x0 0x{clint_size_hex.lstrip('0x')}"
529-
update_dts_node(dts_file, 'clint', clint_base_hex.lstrip('0x'), clint_reg_val)
534+
clint_base_int = int(board_iregion_base, 16) + 0x31000
535+
clint_base_int_high = (clint_base_int >> 32) & 0xFFFFFFFF
536+
clint_base_int_low = clint_base_int & 0xFFFFFFFF
537+
clint_size_int = 0xC000
538+
clint_size_int_high = (clint_size_int >> 32) & 0xFFFFFFFF
539+
clint_size_int_low = clint_size_int & 0xFFFFFFFF
540+
clint_reg_val = f"0x{clint_base_int_high:x} 0x{clint_base_int_low:x} 0x{clint_size_int_high:x} 0x{clint_size_int_low:x}"
541+
update_dts_node(dts_file, 'clint', format(clint_base_int, 'x'), clint_reg_val)
530542

531543
# update sysrst dts node
532544
sysrst_base_addr = int(board_iregion_base, 16) + 0x30FF0
533545
sysrst_high = (sysrst_base_addr >> 32) & 0xFFFFFFFF
534546
sysrst_low = sysrst_base_addr & 0xFFFFFFFF
535-
sysrst_reg_val = f"0x{sysrst_high:x} 0x{sysrst_low:x}"
536-
update_dts_node_simple(dts_file, 'sysrst', sysrst_reg_val)
547+
sysrst_reg_val = f"0x{sysrst_high:x} 0x{sysrst_low:x} 0x0 0x0"
548+
update_dts_node(dts_file, 'sysrst', format(sysrst_base_addr, 'x'), sysrst_reg_val)
537549

538550
if board_uart0_base is not None:
539551
# update uart0 dts node
540-
uart0_base_hex = hex(int(board_uart0_base, 16))
541-
uart0_size_hex = hex(0x1000)
542-
uart0_reg_val = f"0x0 0x{uart0_base_hex.lstrip('0x')} 0x0 0x{uart0_size_hex.lstrip('0x')}"
543-
update_dts_node(dts_file, 'uart0', uart0_base_hex.lstrip('0x'), uart0_reg_val, board_uart0_irq)
552+
uart0_base_int = int(board_uart0_base, 16)
553+
uart0_base_int_high = (uart0_base_int >> 32) & 0xFFFFFFFF
554+
uart0_base_int_low = uart0_base_int & 0xFFFFFFFF
555+
556+
uart0_size_int = 0x1000
557+
uart0_size_int_high = (uart0_size_int >> 32) & 0xFFFFFFFF
558+
uart0_size_int_low = uart0_size_int & 0xFFFFFFFF
559+
560+
uart0_reg_val = f"0x{uart0_base_int_high:x} 0x{uart0_base_int_low:x} 0x{uart0_size_int_high:x} 0x{uart0_size_int_low:x}"
561+
update_dts_node(dts_file, 'uart0', format(uart0_base_int, 'x'), uart0_reg_val, board_uart0_irq)
544562

545563
if board_uart1_base is not None:
546564
# update uart1 dts node
547-
uart1_base_hex = hex(int(board_uart1_base, 16))
548-
uart1_size_hex = hex(0x1000)
549-
uart1_reg_val = f"0x0 0x{uart1_base_hex.lstrip('0x')} 0x0 0x{uart1_size_hex.lstrip('0x')}"
550-
update_dts_node(dts_file, 'uart1', uart1_base_hex.lstrip('0x'), uart1_reg_val, board_uart1_irq)
565+
uart1_base_int = int(board_uart1_base, 16)
566+
uart1_base_int_high = (uart1_base_int >> 32) & 0xFFFFFFFF
567+
uart1_base_int_low = uart1_base_int & 0xFFFFFFFF
568+
uart1_size_int = 0x1000
569+
uart1_size_int_high = (uart1_size_int >> 32) & 0xFFFFFFFF
570+
uart1_size_int_low = uart1_size_int & 0xFFFFFFFF
571+
uart1_reg_val = f"0x{uart1_base_int_high:x} 0x{uart1_base_int_low:x} 0x{uart1_size_int_high:x} 0x{uart1_size_int_low:x}"
572+
update_dts_node(dts_file, 'uart1', format(uart1_base_int, 'x'), uart1_reg_val, board_uart1_irq)
551573

552574
if board_qspi0_base is not None:
553575
# update qspi0 dts node
554-
qspi0_base_hex = hex(int(board_qspi0_base, 16))
555-
qspi0_size_hex = hex(0x1000)
556-
qspi0_reg_val = f"0x0 0x{qspi0_base_hex.lstrip('0x')} 0x0 0x{qspi0_size_hex.lstrip('0x')}"
557-
update_dts_node(dts_file, 'qspi0', qspi0_base_hex.lstrip('0x'), qspi0_reg_val, board_qspi0_irq)
576+
qspi0_base_int = int(board_qspi0_base, 16)
577+
qspi0_base_int_high = (qspi0_base_int >> 32) & 0xFFFFFFFF
578+
qspi0_base_int_low = qspi0_base_int & 0xFFFFFFFF
579+
580+
qspi0_size_int = 0x1000
581+
qspi0_size_int_high = (qspi0_size_int >> 32) & 0xFFFFFFFF
582+
qspi0_size_int_low = qspi0_size_int & 0xFFFFFFFF
583+
584+
qspi0_reg_val = f"0x{qspi0_base_int_high:x} 0x{qspi0_base_int_low:x} 0x{qspi0_size_int_high:x} 0x{qspi0_size_int_low:x}"
585+
update_dts_node(dts_file, 'qspi0', format(qspi0_base_int, 'x'), qspi0_reg_val, board_qspi0_irq)
558586

559587
if board_qspi2_base is not None:
560588
# update qspi2 dts node
561-
qspi2_base_hex = hex(int(board_qspi2_base, 16))
562-
qspi2_size_hex = hex(0x1000)
563-
qspi2_reg_val = f"0x0 0x{qspi2_base_hex.lstrip('0x')} 0x0 0x{qspi2_size_hex.lstrip('0x')}"
564-
update_dts_node(dts_file, 'qspi2', qspi2_base_hex.lstrip('0x'), qspi2_reg_val, board_qspi2_irq)
589+
qspi2_base_int = int(board_qspi2_base, 16)
590+
qspi2_base_int_high = (qspi2_base_int >> 32) & 0xFFFFFFFF
591+
qspi2_base_int_low = qspi2_base_int & 0xFFFFFFFF
592+
593+
qspi2_size_int = 0x1000
594+
qspi2_size_int_high = (qspi2_size_int >> 32) & 0xFFFFFFFF
595+
qspi2_size_int_low = qspi2_size_int & 0xFFFFFFFF
596+
597+
qspi2_reg_val = f"0x{qspi2_base_int_high:x} 0x{qspi2_base_int_low:x} 0x{qspi2_size_int_high:x} 0x{qspi2_size_int_low:x}"
598+
update_dts_node(dts_file, 'qspi2', format(qspi2_base_int, 'x'), qspi2_reg_val, board_qspi2_irq)
565599
update_plic_intr_num(dts_file, board_irqmax)
566600

567601
print("\n>>>Updating uboot.cmd...")

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