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| 1 | +# Nuclei 100 Series Core Device Templates |
| 2 | + |
| 3 | +The [**evalsoc**][4] implementation in Nuclei N100 SDK serves as a **latest reference implementation** using Nuclei 100 series CPU. |
| 4 | + |
| 5 | +We support the following toolchains in this evalsoc implementation: |
| 6 | + |
| 7 | +- **Nuclei RISC-V GNU Toolchain**: https://doc.nucleisys.com/nuclei_tools/toolchain/gnu/index.html |
| 8 | +- **Nuclei RISC-V LLVM Toolchain**: https://doc.nucleisys.com/nuclei_tools/toolchain/llvm/index.html |
| 9 | +- **IAR RISC-V Toolchain**: http://iar.com/riscv |
| 10 | +- **Terapines ZCC Toolchain**: https://www.terapines.com/products/zcc |
| 11 | + |
| 12 | +## Quick Porting Guide |
| 13 | + |
| 14 | +To quickly port this SDK to your custom SoC (designed with Nuclei 100 series CPU), please refer to our comprehensive porting guide: |
| 15 | + |
| 16 | +[Porting Guide: From EvalSoC to Custom SoC](https://doc.nucleisys.com/nuclei_studio_supply/28-quick_porting_from_evalsoc_to_customsoc_based_on_Nuclei_SDK) |
| 17 | + |
| 18 | +## Directory Structure |
| 19 | + |
| 20 | +### Board Support (`Board/nuclei_fpga_eval/`) |
| 21 | + |
| 22 | +* Configuration Files |
| 23 | + - `npk.yml`: Board Support Package Configuration File for [NPK][2] |
| 24 | + - `openocd_evalsoc.cfg`: OpenOCD configuration for on-board debugging using [HummingBird Debugger][3] |
| 25 | + |
| 26 | +* Header Files (`Include/`) |
| 27 | + - `nuclei_sdk_hal.h`: Hardware abstraction layer interface |
| 28 | + - Defines debug UART (UART0) |
| 29 | + - Configures debug output or suppress debug output via `NMSIS_DISABLE_DEBUG` |
| 30 | + - `board_nuclei_fpga_eval.h`: Board specific header file for peripheral access if needed |
| 31 | + |
| 32 | +* Linker Scripts (`Source/GCC/` and `Source/IAR/`) |
| 33 | + - `Source/GCC`: Linker Scripts for GCC/Clang toolchain |
| 34 | + - `Source/IAR`: Linker Scripts for IAR toolchain |
| 35 | + - Provide sample linker script in GCC/Clang toolchain: |
| 36 | + - `gcc_evalsoc_sram.ld`: code and data all placed in sram |
| 37 | + - Provide sample linker script in IAR toolchain: |
| 38 | + - `iar_evalsoc_sram.icf`: code and data all placed in sram |
| 39 | + |
| 40 | +### SoC Support (`Common/`) |
| 41 | + |
| 42 | +#### Core Definition Files |
| 43 | + |
| 44 | +* `evalsoc.svd`: System View Description file, provided by SoC vendor |
| 45 | + - Peripheral register definitions |
| 46 | + - Interrupt configurations |
| 47 | + - Memory map details |
| 48 | + |
| 49 | +* `npk.yml`: SoC Support Package Configuration File for [NPK][2] |
| 50 | + |
| 51 | +#### Include Files (`Common/Include/`) |
| 52 | + |
| 53 | +* `cpufeature.h`: Nuclei RISC-V CPU feature header file |
| 54 | + - This file is generated by `nuclei_gen` tool |
| 55 | + - Used by `evalsoc.h` to define CPU feature macros used in NMSIS Core header files |
| 56 | + |
| 57 | +* `evalsoc.h`: Core SoC definitions |
| 58 | + - Base addresses for peripherals |
| 59 | + - Interrupt definitions |
| 60 | + - Nuclei RISC-V CPU feature macros |
| 61 | + - You can customize this file to add more SoC definitions |
| 62 | + |
| 63 | +* `evalsoc_uart.h`: UART driver interface |
| 64 | + |
| 65 | +* `system_evalsoc.h`: System configuration |
| 66 | + - Clock initialization |
| 67 | + - Core initialization routines |
| 68 | + - System frequency setup |
| 69 | + - Interrupt(IRQC) and Exception API |
| 70 | + |
| 71 | +* `nuclei_sdk_soc.h`: SDK SoC common header file |
| 72 | + - Includes all peripheral headers |
| 73 | + - Common definitions for the SoC |
| 74 | + - Include `evalsoc.h` |
| 75 | + |
| 76 | +#### Source Files (`Common/Source/`) |
| 77 | + |
| 78 | +* Startup/Interrupt and Exception Code |
| 79 | + - Startup Code: |
| 80 | + - GCC/Clang version: `GCC/startup_evalsoc.S` |
| 81 | + - IAR version: `IAR/startup.S` and `IAR/startup_evalsoc.c` |
| 82 | + - Interrupt and Exception Code: |
| 83 | + - GCC/Clang version: M-Mode -> `GCC/intexc_evalsoc.S` |
| 84 | + - IAR version: M-Mode -> `IAR/intexc_evalsoc.S` |
| 85 | + |
| 86 | +* System Configuration Code |
| 87 | + - `evalsoc_common.c`: get soc frequency via timer freq, and delay function and etc, |
| 88 | + which can be deleted if not needed |
| 89 | + - `system_evalsoc.c`: template code for system configuration, |
| 90 | + it will do premain initialization, interrupt and exception initialization, |
| 91 | + uart initialization and print banner, you can customize it as needed |
| 92 | + |
| 93 | +* Driver Implementations(`Drivers`) |
| 94 | + - UART driver: `evalsoc_uart.c` |
| 95 | + |
| 96 | +* Standard C Library Stub Code(`Stubs`) |
| 97 | + - Newlib stubs: `Stubs/newlib` |
| 98 | + - IAR DLib stubs: `Stubs/iardlib` |
| 99 | + - Nuclei C Runtime Library(libncrt) stubs: `Stubs/libncrt` |
| 100 | + - You only need one of them depending on your which c library you are using |
| 101 | + |
| 102 | +### Build Configuration |
| 103 | + |
| 104 | +* `build.mk`: Main build rules for the SoC |
| 105 | + - CPU ARCH related compiler flags such as `march`, `mabi` and `mtune` |
| 106 | + - Include paths |
| 107 | + - Source files |
| 108 | + - Support code if you have qemu or other simulators supported |
| 109 | + |
| 110 | +* `cpufeature.mk`: CPU extension configuration |
| 111 | + - Select which CPU Core you are using, see https://doc.nucleisys.com/nuclei_n100_sdk/develop/buildsystem.html#develop-buildsystem-var-core |
| 112 | + - Select which CPU extensions you are using, see https://doc.nucleisys.com/nuclei_n100_sdk/develop/buildsystem.html#arch-ext |
| 113 | + - Used by `build.mk` |
| 114 | + |
| 115 | + |
| 116 | +[1]: https://doc.nucleisys.com/nmsis/core/core_templates.html |
| 117 | +[2]: https://doc.nucleisys.com/nuclei_tools/ide/npkoverview.html |
| 118 | +[3]: https://nucleisys.com/developboard.php#debuggerkit |
| 119 | +[4]: https://doc.nucleisys.com/nuclei_n100_sdk/design/soc/evalsoc.html |
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