Register readback not working

[stfarley]

When connected to a SPI_AXI bridge "https://github.com/airhdl/spi-to-axi-bridge" , I can see the read data being returned but can't access it from the testbench.

Modelled after the "CtrlRx0 test case" I am doing this. The signal trans_dat_rx_dbg is always zeros.

signal trans_dat_rx_dbg : trans_dat_t := (others => (others => '0'));
........
variable trans_dat_tx : trans_dat_t := (others => (others => '0'));
variable trans_dat_rx : trans_dat_t := (others => (others => '0'));
.......

for i in 0 to 10 loop
sendasync(spirec,trans_dat_tx(i));
end loop;
for i in 0 to 10 loop
get(spirec,trans_dat_rx(i));
trans_dat_rx_dbg(i) <= trans_dat_rx(i);
end loop;

It seems this should be the same thing that the test case does.
If I execute the second loop several times I can sometimes get some data out of it.

Just wondering if I am doing something wrong here.

Thanks