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Description
Hello, does the core have support for fault/exception handlers?
I would like to catch exceptions in the CPU like misaligned load/stores, illegal instructions being executed, and so on (not interrupts).
According to the picorv32 README: "When no external PCPI core acknowledges the instruction within 16 clock cycles, then an illegal instruction exception is raised and the respective interrupt handler is called" which makes me believe there is support for these handlers, but no idea how to set them up from the firmware.
Is this configured in this icestudio version, and if so, at which addresses do I need to set up my routines, routine tables, etc? What registers to poke? I think the picorv32 does not follow the ISA 1:1 so there may be some custom thing going on.
Thanks.