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Update SMC2 entry and add SMC3 entry
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tools/svdconv/SVDModel/src/SvdTypes.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,8 @@ const map <SvdTypes::CpuType, CpuTypeFeature> SvdTypes::cpuTypeName = {
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// Arm China
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{ SvdTypes::CpuType::SMC1 , {"SMC1" , "ARM China Star-MC1", 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 480 } }, // ~ M33
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{ SvdTypes::CpuType::SMC2 , {"SMC1" , "ARM China Star-MC2", 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 480 } },
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{ SvdTypes::CpuType::SMC2 , {"SMC2" , "ARM China Star-MC2", 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 480 } },
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{ SvdTypes::CpuType::SMC3 , {"SMC3" , "ARM China Star-MC3", 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 480 } },
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// SVDConv not supported
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{ SvdTypes::CpuType::CA5 , {"CA5" , "ARM Cortex-A5" , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 240 } },

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