From 61fb6c740333d166933b25449bf5b797a55e140b Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Sun, 30 Nov 2025 04:52:32 +0000 Subject: [PATCH 1/2] Initial plan From 5f19c8f1f30cc024de88b09419cffe303b11840a Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Sun, 30 Nov 2025 04:59:16 +0000 Subject: [PATCH 2/2] Replace M33_SCR_SLEEPDEEP_BITS with standard CMSIS SCB_SCR_SLEEPDEEP_Msk Co-authored-by: yudataguy <25761223+yudataguy@users.noreply.github.com> --- .../Components/ModeManager/PicoSleep.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/FprimeZephyrReference/Components/ModeManager/PicoSleep.cpp b/FprimeZephyrReference/Components/ModeManager/PicoSleep.cpp index c88a68b8..500c4c74 100644 --- a/FprimeZephyrReference/Components/ModeManager/PicoSleep.cpp +++ b/FprimeZephyrReference/Components/ModeManager/PicoSleep.cpp @@ -18,6 +18,11 @@ #include #include +// CMSIS headers for standard Cortex-M SCB access +#if defined(CONFIG_CPU_CORTEX_M) +#include +#endif + // RP2350 Pico SDK includes for AON timer and power management #if defined(CONFIG_SOC_RP2350) || defined(CONFIG_SOC_SERIES_RP2XXX) #include @@ -123,7 +128,8 @@ static void sleep_power_up(void) { // Enter dormant mode - processor will halt until AON timer alarm static void go_dormant(void) { // Enable deep sleep in the processor (Cortex-M33) - scb_hw->scr |= M33_SCR_SLEEPDEEP_BITS; + // Use standard CMSIS SCB register access instead of SDK-specific scb_hw + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; // Disable all clocks except those needed for dormant wake // On RP2350, CLK_REF_POWMAN needs to stay enabled for AON timer @@ -139,7 +145,7 @@ static void go_dormant(void) { clocks_hw->sleep_en1 = 0xFFFFFFFF; // Clear deep sleep bit - scb_hw->scr &= ~M33_SCR_SLEEPDEEP_BITS; + SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; } #endif // CONFIG_SOC_RP2350