From 4f202ef39069532c234405b800326ab9fd183b61 Mon Sep 17 00:00:00 2001 From: Saidi Adams Date: Fri, 31 Oct 2025 19:07:44 -0500 Subject: [PATCH] stuff --- Makefile | 2 +- .../proves_flight_control_board_v5.dtsi | 50 +++++++++--- .../Kconfig.proves_flight_control_board_v5c | 2 +- ...ht_control_board_v5c_rp2350a_m33_defconfig | 4 +- interface/cmsis-dap.cfg | 12 +++ lib/zephyr-workspace/zephyr | 2 +- prj.conf | 2 + target/rp2350.cfg | 79 +++++++++++++++++++ west.yml | 2 +- 9 files changed, 139 insertions(+), 16 deletions(-) create mode 100644 interface/cmsis-dap.cfg create mode 100644 target/rp2350.cfg diff --git a/Makefile b/Makefile index c27a53e8..f39f38a3 100644 --- a/Makefile +++ b/Makefile @@ -62,7 +62,7 @@ clean: ## Remove all gitignored files ##@ Operations -GDS_COMMAND ?= $(UV_RUN) fprime-gds -n --dictionary $(ARTIFACT_DIR)/zephyr/fprime-zephyr-deployment/dict/ReferenceDeploymentTopologyDictionary.json --communication-selection uart --uart-baud 115200 --output-unframed-data +GDS_COMMAND ?= $(UV_RUN) fprime-gds -n --dictionary ~/Downloads/artifacts/zephyr/fprime-zephyr-deployment/dict/ReferenceDeploymentTopologyDictionary.json --communication-selection uart --uart-baud 115200 --output-unframed-data ARTIFACT_DIR ?= $(shell pwd)/build-artifacts .PHONY: gds diff --git a/boards/bronco_space/proves_flight_control_board_v5/proves_flight_control_board_v5.dtsi b/boards/bronco_space/proves_flight_control_board_v5/proves_flight_control_board_v5.dtsi index 397708c7..2cb321b2 100644 --- a/boards/bronco_space/proves_flight_control_board_v5/proves_flight_control_board_v5.dtsi +++ b/boards/bronco_space/proves_flight_control_board_v5/proves_flight_control_board_v5.dtsi @@ -9,13 +9,24 @@ chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,flash-controller = &qmi; zephyr,console = &cdc_acm_uart0; + zephyr,cdc-acm-uart = &cdc_acm_uart0; zephyr,shell-uart = &cdc_acm_uart0; - zephyr,code-partition = &code_partition; }; aliases { watchdog0 = &wdt0; + mcuboot-button0 = &mcuboot_button; + }; + + buttons { + compatible = "gpio-keys"; + + mcuboot_button: button_0 { + label = "MCUBOOT Thing"; + gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; + }; }; leds { @@ -58,22 +69,41 @@ zephyr_udc0: &usbd { * smaller than 256 bytes, but in practice the linker places the vector * table at a much larger alignment offset. */ - image_def: partition@0 { - label = "image_def"; - reg = <0x00000000 0x100>; - read-only; - }; + + /* image_def: partition@0 { */ + /* label = "image_def"; */ + /* reg = <0x00000000 0x100>; */ + /* read-only; */ + /* }; */ /* * Usable flash. Starts at 0x100, after the image definition block. * The partition size is 4MB minus the 0x100 bytes taken by the * image definition. */ - code_partition: partition@100 { - label = "code-partition"; - reg = <0x100 (DT_SIZE_M(4) - 0x100)>; - read-only; + + /* code_partition: partition@100 { */ + /* label = "code-partition"; */ + /* reg = <0x100 (DT_SIZE_M(4) - 0x100)>; */ + /* read-only; */ + /* }; */ + + boot_partition: partition@100 { + label = "mcuboot"; + reg = <0x00000100 DT_SIZE_K(1024)>; + read-only; + }; + + slot0_partition: partition@100100 { + label = "image-0"; + reg = <0x00100100 DT_SIZE_K(1024)>; }; + + slot1_partition: partition@200100 { + label = "image-1"; + reg = <0x00200100 DT_SIZE_K(1024)>; + }; + }; }; diff --git a/boards/bronco_space/proves_flight_control_board_v5c/Kconfig.proves_flight_control_board_v5c b/boards/bronco_space/proves_flight_control_board_v5c/Kconfig.proves_flight_control_board_v5c index ce2e6e17..343481b0 100644 --- a/boards/bronco_space/proves_flight_control_board_v5c/Kconfig.proves_flight_control_board_v5c +++ b/boards/bronco_space/proves_flight_control_board_v5c/Kconfig.proves_flight_control_board_v5c @@ -1 +1 @@ -source "../../../boards/bronco_space/proves_flight_control_board_v5/Kconfig.defconfig" +source "/Users/aychar/code/proves-core-reference/boards/bronco_space/proves_flight_control_board_v5/Kconfig.defconfig" diff --git a/boards/bronco_space/proves_flight_control_board_v5c/proves_flight_control_board_v5c_rp2350a_m33_defconfig b/boards/bronco_space/proves_flight_control_board_v5c/proves_flight_control_board_v5c_rp2350a_m33_defconfig index 02bb4603..5dfef2f8 100644 --- a/boards/bronco_space/proves_flight_control_board_v5c/proves_flight_control_board_v5c_rp2350a_m33_defconfig +++ b/boards/bronco_space/proves_flight_control_board_v5c/proves_flight_control_board_v5c_rp2350a_m33_defconfig @@ -5,9 +5,9 @@ CONFIG_CONSOLE=y CONFIG_GPIO=y CONFIG_RESET=y CONFIG_SERIAL=y -CONFIG_UART_CONSOLE=y +CONFIG_UART_CONSOLE=n CONFIG_UART_INTERRUPT_DRIVEN=y -CONFIG_USE_DT_CODE_PARTITION=y +CONFIG_USE_DT_CODE_PARTITION=n CONFIG_USB_DEVICE_STACK=y CONFIG_USB_DEVICE_PRODUCT="PROVES Flight Control Board v5c" CONFIG_USB_DEVICE_VID=0x0028 diff --git a/interface/cmsis-dap.cfg b/interface/cmsis-dap.cfg new file mode 100644 index 00000000..15efe806 --- /dev/null +++ b/interface/cmsis-dap.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# +# ARM CMSIS-DAP compliant adapter +# +# http://www.keil.com/support/man/docs/dapdebug/ +# + +adapter driver cmsis-dap + +# Optionally specify the serial number of CMSIS-DAP usb device. +# adapter serial 02200201E6661E601B98E3B9 diff --git a/lib/zephyr-workspace/zephyr b/lib/zephyr-workspace/zephyr index 413b789d..6acfdf72 160000 --- a/lib/zephyr-workspace/zephyr +++ b/lib/zephyr-workspace/zephyr @@ -1 +1 @@ -Subproject commit 413b789deb391d3a37d06b463288a5fe765ee57e +Subproject commit 6acfdf72119c64ddf0867b920ea058d638a3a07c diff --git a/prj.conf b/prj.conf index f1715943..88fa19a5 100644 --- a/prj.conf +++ b/prj.conf @@ -54,3 +54,5 @@ CONFIG_LOG=n CONFIG_LOG_DEFAULT_LEVEL=3 CONFIG_CBPRINTF_FP_SUPPORT=y + +CONFIG_BOOTLOADER_MCUBOOT=y diff --git a/target/rp2350.cfg b/target/rp2350.cfg new file mode 100644 index 00000000..104e8ecc --- /dev/null +++ b/target/rp2350.cfg @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# RP2350 is a microcontroller with dual Cortex-M33 cores or dual Hazard3 cores. +# https://www.raspberrypi.com/documentation/microcontrollers/rp2350.html + +transport select swd + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME rp2350 +} + +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x10000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x00040927 +} + +# Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread +# handling of both cores, anything else for isolated debugging of both cores +if { [info exists USE_CORE] } { + set _USE_CORE $USE_CORE +} else { + set _USE_CORE SMP +} +set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }] + +swj_newdap $_CHIPNAME swd -expected-id $_CPUTAPID +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.swd -adiv6 +# core 0 +if { $_USE_CORE != 1 } { + set _TARGETNAME_0 $_CHIPNAME.dap.core0 + target create $_CHIPNAME.dap.core0 cortex_m -dap $_CHIPNAME.dap -ap-num 0x2000 -coreid 0 -rtos hwthread +} +# core 1 +if { $_USE_CORE != 0 } { + set _TARGETNAME_1 $_CHIPNAME.dap.core1 + target create $_CHIPNAME.dap.core1 cortex_m -dap $_CHIPNAME.dap -ap-num 0x4000 -coreid 1 -rtos hwthread +} + +if {[string compare $_USE_CORE SMP] == 0} { + $_TARGETNAME_0 configure -rtos hwthread + $_TARGETNAME_1 configure -rtos hwthread + target smp $_TARGETNAME_0 $_TARGETNAME_1 +} + +if { $_USE_CORE == 1 } { + set _FLASH_TARGET $_TARGETNAME_1 +} else { + set _FLASH_TARGET $_TARGETNAME_0 +} +# Backup the work area. The flash probe runs an algorithm on the target CPU. +# The flash is probed during gdb connect if gdb_memory_map is enabled (by default). +$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1 +set _FLASHNAME $_CHIPNAME.flash +set _FLASHBASE 0x10000000 +# Max size is 2 x 16 MiB (for two chip selects with 24-bit addressing) -> 32 MiB +set _FLASHSIZE 0x2000000 +flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME_0 + +if { $_BOTH_CORES } { + # Alias to ensure gdb connecting to core 1 gets the correct memory map + flash bank $_CHIPNAME.alias virtual 0x10000000 0 0 0 $_TARGETNAME_1 $_FLASHNAME + + # Select core 0 + targets $_TARGETNAME_0 +} + +# srst does not exist; use SYSRESETREQ to perform a soft reset +cortex_m reset_config sysresetreq diff --git a/west.yml b/west.yml index 5e9079dc..5d38bddb 100644 --- a/west.yml +++ b/west.yml @@ -46,7 +46,7 @@ manifest: - name: hal_rpi_pico path: lib/zephyr-workspace/modules/hal/rpi_pico - revision: 7b57b24588797e6e7bf18b6bda168e6b96374264 + revision: 5a981c7c29e3846646549a1902183684f0147e1d groups: - hal