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Refs #2899. Merge branch 'damonyu1989-openblas-open-910' into risc-v
2 parents 913cc9a + fc35b72 commit 1ea6cfe

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Makefile.prebuild

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@@ -41,6 +41,10 @@ ifeq ($(TARGET), I6500)
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TARGET_FLAGS = -mips64r6
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endif
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ifeq ($(TARGET), C910V)
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TARGET_FLAGS = -march=rv64gcvxthead -mabi=lp64v
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endif
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all: getarch_2nd
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./getarch_2nd 0 >> $(TARGET_MAKE)
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./getarch_2nd 1 >> $(TARGET_CONF)

Makefile.riscv64

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ifeq ($(CORE), C910V)
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CCOMMON_OPT += -march=rv64gcvxthead -mabi=lp64v
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FCOMMON_OPT += -march=rv64gcvxthead -mabi=lp64v -static
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endif

Makefile.system

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@@ -751,7 +751,10 @@ endif
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endif
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endif
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ifeq ($(ARCH), riscv64)
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NO_BINARY_MODE = 1
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BINARY_DEFINED = 1
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endif
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#

common_riscv64.h

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@@ -73,6 +73,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define MB __sync_synchronize()
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#define WMB __sync_synchronize()
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#define RMB __sync_synchronize()
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#define INLINE inline
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@@ -90,4 +91,8 @@ static inline int blas_quickdivide(blasint x, blasint y){
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#define BUFFER_SIZE ( 32 << 20)
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#define SEEK_ADDRESS
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#if defined(C910V)
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#include <riscv-vector.h>
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#endif
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#endif

cpuid_riscv64.c

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@@ -71,9 +71,11 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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/*********************************************************************/
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#define CPU_UNKNOWN 0
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#define CPU_C910V 1
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static char *cpuname[] = {
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"UNKOWN",
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"C910V"
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};
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int detect(void){

getarch.c

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@@ -1280,6 +1280,21 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define CORENAME "Z14"
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#endif
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#ifdef FORCE_C910V
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#define FORCE
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#define ARCHITECTURE "RISCV64"
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#define SUBARCHITECTURE "C910V"
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#define SUBDIRNAME "riscv64"
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#define ARCHCONFIG "-DC910V " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
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"-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
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"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
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#define LIBNAME "c910v"
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#define CORENAME "C910V"
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#else
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#endif
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#ifndef FORCE
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#ifdef USER_TARGET

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