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Merge pull request #1526 from jerryz123/upstream_riscv
Add support for RISC-V
2 parents 0c4718c + 0ee395d commit cbc4616

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‎Makefile.riscv64

Whitespace-only changes.

‎Makefile.system

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@@ -593,7 +593,9 @@ endif
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ifndef BINARY_DEFINED
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ifneq ($(OSNAME), AIX)
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ifdef BINARY64
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ifneq ($(ARCH), riscv64)
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CCOMMON_OPT += -m64
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endif
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else
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CCOMMON_OPT += -m32
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endif
@@ -687,8 +689,10 @@ endif
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else
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ifdef BINARY64
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ifneq ($(OSNAME), AIX)
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ifneq ($(ARCH), riscv64)
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FCOMMON_OPT += -m64
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endif
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endif
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ifdef INTERFACE64
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ifneq ($(INTERFACE64), 0)
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FCOMMON_OPT += -fdefault-integer-8

‎c_check

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@@ -76,6 +76,7 @@ $architecture = ia64 if ($data =~ /ARCH_IA64/);
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$architecture = arm if ($data =~ /ARCH_ARM/);
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$architecture = arm64 if ($data =~ /ARCH_ARM64/);
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$architecture = zarch if ($data =~ /ARCH_ZARCH/);
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$architecture = riscv64 if ($data =~ /ARCH_RISCV64/);
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$defined = 0;
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‎common.h

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@@ -408,6 +408,11 @@ please https://github.com/xianyi/OpenBLAS/issues/246
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#include "common_mips.h"
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#endif
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#ifdef ARCH_RISCV64
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#include "common_riscv64.h"
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#endif
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#ifdef ARCH_MIPS64
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#include "common_mips64.h"
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#endif

‎common_riscv64.h

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@@ -0,0 +1,93 @@
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/*****************************************************************************
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Copyright (c) 2011-2014, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
10+
notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
15+
distribution.
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3. Neither the name of the OpenBLAS project nor the names of
17+
its contributors may be used to endorse or promote products
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derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29+
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************************/
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/*********************************************************************/
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/* Copyright 2009, 2010 The University of Texas at Austin. */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or */
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/* without modification, are permitted provided that the following */
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/* conditions are met: */
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/* */
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/* 1. Redistributions of source code must retain the above */
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/* copyright notice, this list of conditions and the following */
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/* disclaimer. */
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/* */
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/* 2. Redistributions in binary form must reproduce the above */
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/* copyright notice, this list of conditions and the following */
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/* disclaimer in the documentation and/or other materials */
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/* provided with the distribution. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
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/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
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/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
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/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
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/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
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/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
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/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
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/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
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/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
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/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
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/* POSSIBILITY OF SUCH DAMAGE. */
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/* */
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/* The views and conclusions contained in the software and */
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/* documentation are those of the authors and should not be */
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/* interpreted as representing official policies, either expressed */
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/* or implied, of The University of Texas at Austin. */
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/*********************************************************************/
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#ifndef COMMON_RISCV64
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#define COMMON_RISCV64
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#define MB __sync_synchronize()
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#define WMB __sync_synchronize()
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#define INLINE inline
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#ifndef ASSEMBLER
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static inline int blas_quickdivide(blasint x, blasint y){
83+
return x / y;
84+
}
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#endif
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#define BUFFER_SIZE ( 32 << 20)
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#define SEEK_ADDRESS
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#endif

‎cpuid_riscv64.c

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@@ -0,0 +1,111 @@
1+
/*****************************************************************************
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Copyright (c) 2011-2014, The OpenBLAS Project
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All rights reserved.
4+
5+
Redistribution and use in source and binary forms, with or without
6+
modification, are permitted provided that the following conditions are
7+
met:
8+
9+
1. Redistributions of source code must retain the above copyright
10+
notice, this list of conditions and the following disclaimer.
11+
12+
2. Redistributions in binary form must reproduce the above copyright
13+
notice, this list of conditions and the following disclaimer in
14+
the documentation and/or other materials provided with the
15+
distribution.
16+
3. Neither the name of the OpenBLAS project nor the names of
17+
its contributors may be used to endorse or promote products
18+
derived from this software without specific prior written
19+
permission.
20+
21+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26+
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27+
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28+
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29+
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
30+
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31+
32+
**********************************************************************************/
33+
34+
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/*********************************************************************/
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/* Copyright 2009, 2010 The University of Texas at Austin. */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or */
40+
/* without modification, are permitted provided that the following */
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/* conditions are met: */
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/* */
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/* 1. Redistributions of source code must retain the above */
44+
/* copyright notice, this list of conditions and the following */
45+
/* disclaimer. */
46+
/* */
47+
/* 2. Redistributions in binary form must reproduce the above */
48+
/* copyright notice, this list of conditions and the following */
49+
/* disclaimer in the documentation and/or other materials */
50+
/* provided with the distribution. */
51+
/* */
52+
/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
53+
/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
54+
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
55+
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
56+
/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
57+
/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
58+
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
59+
/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
60+
/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
61+
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
62+
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
63+
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
64+
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
65+
/* POSSIBILITY OF SUCH DAMAGE. */
66+
/* */
67+
/* The views and conclusions contained in the software and */
68+
/* documentation are those of the authors and should not be */
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/* interpreted as representing official policies, either expressed */
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/* or implied, of The University of Texas at Austin. */
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/*********************************************************************/
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#define CPU_UNKNOWN 0
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static char *cpuname[] = {
76+
"UNKOWN",
77+
};
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int detect(void){
80+
return CPU_UNKNOWN;
81+
}
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char *get_corename(void){
84+
return cpuname[detect()];
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}
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void get_architecture(void){
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printf("RISCV64");
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}
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void get_subarchitecture(void){
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}
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void get_subdirname(void){
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printf("riscv64");
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}
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void get_cpuconfig(void){
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printf("#define UNKNOWN\n");
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printf("#define L1_DATA_SIZE 65536\n");
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printf("#define L1_DATA_LINESIZE 32\n");
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printf("#define L2_SIZE 512488\n");
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printf("#define L2_LINESIZE 32\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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}
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void get_libname(void){
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printf("riscv64\n");
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}

‎ctest.c

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@@ -149,3 +149,7 @@ ARCH_ARM
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ARCH_ARM64
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#endif
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#if defined(__riscv)
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ARCH_RISCV64
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#endif
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‎getarch.c

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@@ -604,6 +604,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#endif
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#ifdef FORCE_PPCG4
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#define FORCE
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#define ARCHITECTURE "POWER"
@@ -859,6 +860,20 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#else
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#endif
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#ifdef FORCE_RISCV64
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#define FORCE
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#define ARCHITECTURE "RISCV64"
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#define SUBARCHITECTURE "RISCV64"
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#define SUBDIRNAME "riscv64"
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#define ARCHCONFIG "-DRISCV64 " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
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"-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
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"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
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#define LIBNAME "riscv64"
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#define CORENAME "RISCV64"
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#else
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#endif
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#ifdef FORCE_CORTEXA15
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#define FORCE
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#define ARCHITECTURE "ARM"
@@ -1051,6 +1066,10 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define OPENBLAS_SUPPORTED
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#endif
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#ifdef __riscv
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#include "cpuid_riscv64.c"
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#endif
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#ifdef __arm__
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#include "cpuid_arm.c"
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#define OPENBLAS_SUPPORTED

‎kernel/Makefile.L3

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@@ -20,6 +20,10 @@ ifeq ($(ARCH), arm64)
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USE_TRMM = 1
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endif
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ifeq ($(ARCH), riscv64)
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USE_TRMM = 1
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endif
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ifeq ($(TARGET), LOONGSON3B)
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USE_TRMM = 1
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endif

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