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damonyu1989damonyu1989
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Add the support for RISC-V Vector.
Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266
1 parent 756802d commit ef8e7d0

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109 files changed

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‎Makefile.prebuild

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Original file line numberDiff line numberDiff line change
@@ -41,6 +41,10 @@ ifeq ($(TARGET), I6500)
4141
TARGET_FLAGS = -mips64r6
4242
endif
4343

44+
ifeq ($(TARGET), C910V)
45+
TARGET_FLAGS = -march=rv64gcvxthead -mabi=lp64v
46+
endif
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4448
all: getarch_2nd
4549
./getarch_2nd 0 >> $(TARGET_MAKE)
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./getarch_2nd 1 >> $(TARGET_CONF)

‎Makefile.riscv64

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@@ -0,0 +1,4 @@
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ifeq ($(CORE), C910V)
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CCOMMON_OPT += -march=rv64gcvxthead -mabi=lp64v
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FCOMMON_OPT += -march=rv64gcvxthead -mabi=lp64v -static
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endif

‎Makefile.system

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Original file line numberDiff line numberDiff line change
@@ -724,7 +724,10 @@ endif
724724
endif
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endif
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727+
ifeq ($(ARCH), riscv64)
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NO_BINARY_MODE = 1
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BINARY_DEFINED = 1
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endif
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#

‎TargetList.txt

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Original file line numberDiff line numberDiff line change
@@ -104,3 +104,6 @@ VORTEX
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ZARCH_GENERIC
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Z13
106106
Z14
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10.RISC-V 64:
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RISCV64_GENERIC

‎c_check

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Original file line numberDiff line numberDiff line change
@@ -92,6 +92,7 @@ $architecture = ia64 if ($data =~ /ARCH_IA64/);
9292
$architecture = arm if ($data =~ /ARCH_ARM/);
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$architecture = arm64 if ($data =~ /ARCH_ARM64/);
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$architecture = zarch if ($data =~ /ARCH_ZARCH/);
95+
$architecture = riscv64 if ($data =~ /ARCH_RISCV64/);
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9697
$defined = 0;
9798

@@ -136,6 +137,11 @@ if (($architecture eq "x86") && ($os ne Darwin) && ($os ne SunOS)) {
136137
$binary =32;
137138
}
138139

140+
if ($architecture eq "riscv64") {
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$defined = 1;
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$binary = 64;
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}
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139145
if ($compiler eq "PGI") {
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$compiler_name .= " -tp p7" if ($binary eq "32");
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$compiler_name .= " -tp p7-64" if ($binary eq "64");

‎common.h

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Original file line numberDiff line numberDiff line change
@@ -437,6 +437,10 @@ please https://github.com/xianyi/OpenBLAS/issues/246
437437
#include "common_mips.h"
438438
#endif
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440+
#ifdef ARCH_RISCV64
441+
#include "common_riscv64.h"
442+
#endif
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440444
#ifdef ARCH_MIPS64
441445
#include "common_mips64.h"
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#endif

‎common_riscv64.h

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@@ -0,0 +1,98 @@
1+
/*****************************************************************************
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Copyright (c) 2011-2014, The OpenBLAS Project
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All rights reserved.
4+
5+
Redistribution and use in source and binary forms, with or without
6+
modification, are permitted provided that the following conditions are
7+
met:
8+
9+
1. Redistributions of source code must retain the above copyright
10+
notice, this list of conditions and the following disclaimer.
11+
12+
2. Redistributions in binary form must reproduce the above copyright
13+
notice, this list of conditions and the following disclaimer in
14+
the documentation and/or other materials provided with the
15+
distribution.
16+
3. Neither the name of the OpenBLAS project nor the names of
17+
its contributors may be used to endorse or promote products
18+
derived from this software without specific prior written
19+
permission.
20+
21+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26+
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27+
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28+
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29+
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
30+
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31+
**********************************************************************************/
32+
33+
/*********************************************************************/
34+
/* Copyright 2009, 2010 The University of Texas at Austin. */
35+
/* All rights reserved. */
36+
/* */
37+
/* Redistribution and use in source and binary forms, with or */
38+
/* without modification, are permitted provided that the following */
39+
/* conditions are met: */
40+
/* */
41+
/* 1. Redistributions of source code must retain the above */
42+
/* copyright notice, this list of conditions and the following */
43+
/* disclaimer. */
44+
/* */
45+
/* 2. Redistributions in binary form must reproduce the above */
46+
/* copyright notice, this list of conditions and the following */
47+
/* disclaimer in the documentation and/or other materials */
48+
/* provided with the distribution. */
49+
/* */
50+
/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
51+
/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
52+
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
53+
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
54+
/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
55+
/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
56+
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
57+
/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
58+
/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
59+
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
60+
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
61+
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
62+
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
63+
/* POSSIBILITY OF SUCH DAMAGE. */
64+
/* */
65+
/* The views and conclusions contained in the software and */
66+
/* documentation are those of the authors and should not be */
67+
/* interpreted as representing official policies, either expressed */
68+
/* or implied, of The University of Texas at Austin. */
69+
/*********************************************************************/
70+
71+
#ifndef COMMON_RISCV64
72+
#define COMMON_RISCV64
73+
74+
#define MB __sync_synchronize()
75+
#define WMB __sync_synchronize()
76+
#define RMB __sync_synchronize()
77+
78+
#define INLINE inline
79+
80+
#ifndef ASSEMBLER
81+
82+
83+
static inline int blas_quickdivide(blasint x, blasint y){
84+
return x / y;
85+
}
86+
87+
#endif
88+
89+
90+
91+
#define BUFFER_SIZE ( 32 << 20)
92+
#define SEEK_ADDRESS
93+
94+
#if defined(C910V)
95+
#include <riscv-vector.h>
96+
#endif
97+
98+
#endif

‎cpuid_riscv64.c

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,113 @@
1+
/*****************************************************************************
2+
Copyright (c) 2011-2014, The OpenBLAS Project
3+
All rights reserved.
4+
5+
Redistribution and use in source and binary forms, with or without
6+
modification, are permitted provided that the following conditions are
7+
met:
8+
9+
1. Redistributions of source code must retain the above copyright
10+
notice, this list of conditions and the following disclaimer.
11+
12+
2. Redistributions in binary form must reproduce the above copyright
13+
notice, this list of conditions and the following disclaimer in
14+
the documentation and/or other materials provided with the
15+
distribution.
16+
3. Neither the name of the OpenBLAS project nor the names of
17+
its contributors may be used to endorse or promote products
18+
derived from this software without specific prior written
19+
permission.
20+
21+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26+
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27+
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28+
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29+
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
30+
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31+
32+
**********************************************************************************/
33+
34+
35+
/*********************************************************************/
36+
/* Copyright 2009, 2010 The University of Texas at Austin. */
37+
/* All rights reserved. */
38+
/* */
39+
/* Redistribution and use in source and binary forms, with or */
40+
/* without modification, are permitted provided that the following */
41+
/* conditions are met: */
42+
/* */
43+
/* 1. Redistributions of source code must retain the above */
44+
/* copyright notice, this list of conditions and the following */
45+
/* disclaimer. */
46+
/* */
47+
/* 2. Redistributions in binary form must reproduce the above */
48+
/* copyright notice, this list of conditions and the following */
49+
/* disclaimer in the documentation and/or other materials */
50+
/* provided with the distribution. */
51+
/* */
52+
/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
53+
/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
54+
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
55+
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
56+
/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
57+
/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
58+
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
59+
/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
60+
/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
61+
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
62+
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
63+
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
64+
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
65+
/* POSSIBILITY OF SUCH DAMAGE. */
66+
/* */
67+
/* The views and conclusions contained in the software and */
68+
/* documentation are those of the authors and should not be */
69+
/* interpreted as representing official policies, either expressed */
70+
/* or implied, of The University of Texas at Austin. */
71+
/*********************************************************************/
72+
73+
#define CPU_UNKNOWN 0
74+
#define CPU_C910V 1
75+
76+
static char *cpuname[] = {
77+
"UNKOWN",
78+
"C910V"
79+
};
80+
81+
int detect(void){
82+
return CPU_UNKNOWN;
83+
}
84+
85+
char *get_corename(void){
86+
return cpuname[detect()];
87+
}
88+
89+
void get_architecture(void){
90+
printf("RISCV64");
91+
}
92+
93+
void get_subarchitecture(void){
94+
}
95+
96+
void get_subdirname(void){
97+
printf("riscv64");
98+
}
99+
100+
void get_cpuconfig(void){
101+
printf("#define UNKNOWN\n");
102+
printf("#define L1_DATA_SIZE 65536\n");
103+
printf("#define L1_DATA_LINESIZE 32\n");
104+
printf("#define L2_SIZE 512488\n");
105+
printf("#define L2_LINESIZE 32\n");
106+
printf("#define DTB_DEFAULT_ENTRIES 64\n");
107+
printf("#define DTB_SIZE 4096\n");
108+
printf("#define L2_ASSOCIATIVE 4\n");
109+
}
110+
111+
void get_libname(void){
112+
printf("riscv64\n");
113+
}

‎ctest.c

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Original file line numberDiff line numberDiff line change
@@ -153,6 +153,10 @@ ARCH_ARM
153153
ARCH_ARM64
154154
#endif
155155

156+
#if defined(__riscv)
157+
ARCH_RISCV64
158+
#endif
159+
156160
#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L)
157161
HAVE_C11
158162
#endif

‎getarch.c

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Original file line numberDiff line numberDiff line change
@@ -981,6 +981,20 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
981981
#else
982982
#endif
983983

984+
#ifdef FORCE_RISCV64_GENERIC
985+
#define FORCE
986+
#define ARCHITECTURE "RISCV64"
987+
#define SUBARCHITECTURE "RISCV64_GENERIC"
988+
#define SUBDIRNAME "riscv64"
989+
#define ARCHCONFIG "-DRISCV64_GENERIC " \
990+
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
991+
"-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
992+
"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
993+
#define LIBNAME "riscv64_generic"
994+
#define CORENAME "RISCV64_GENERIC"
995+
#else
996+
#endif
997+
984998
#ifdef FORCE_CORTEXA15
985999
#define FORCE
9861000
#define ARCHITECTURE "ARM"
@@ -1252,6 +1266,21 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12521266
#define CORENAME "Z14"
12531267
#endif
12541268

1269+
#ifdef FORCE_C910V
1270+
#define FORCE
1271+
#define ARCHITECTURE "RISCV64"
1272+
#define SUBARCHITECTURE "C910V"
1273+
#define SUBDIRNAME "riscv64"
1274+
#define ARCHCONFIG "-DC910V " \
1275+
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
1276+
"-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
1277+
"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
1278+
#define LIBNAME "c910v"
1279+
#define CORENAME "C910V"
1280+
#else
1281+
#endif
1282+
1283+
12551284
#ifndef FORCE
12561285

12571286
#ifdef USER_TARGET
@@ -1306,6 +1335,10 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
13061335
#define OPENBLAS_SUPPORTED
13071336
#endif
13081337

1338+
#ifdef __riscv
1339+
#include "cpuid_riscv64.c"
1340+
#endif
1341+
13091342
#ifdef __arm__
13101343
#include "cpuid_arm.c"
13111344
#define OPENBLAS_SUPPORTED

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