i3c_target: Update I3C functional test case for prot evb

Originally, the I3C functional test cases were designed for the DCSCM card.
This update adjust them to work with the ast1060_prot EVB.

Signed-off-by: Steven Lee <[email protected]>

Author: stevenlee7189

[email protected]

@@ -439,6 +439,7 @@ pub trait HardwareInterface {
     fn handle_ibis(&mut self, config: &mut I3cConfig);
     fn i3c_aspeed_isr(&mut self, config: &mut I3cConfig);
     // target apis
+    fn target_ibi_raise_hj(&self, config: &mut I3cConfig) -> Result<(), I3cDrvError>;
     fn target_handle_response_ready(&mut self, config: &mut I3cConfig);
     fn target_pending_read_notify(
         &mut self,
@@ -1964,7 +1965,6 @@ impl<I3C: Instance, L: Logger> HardwareInterface for Ast1060I3c<I3C, L> {
             }
 
             if (status & INTR_RESP_READY_STAT) != 0 {
-                i3c_debug!(self.logger, "Response ready");
                 self.target_handle_response_ready(config);
             }
 
@@ -1987,6 +1987,25 @@ impl<I3C: Instance, L: Logger> HardwareInterface for Ast1060I3c<I3C, L> {
         self.enable_irq();
     }
 
+    fn target_ibi_raise_hj(&self, config: &mut I3cConfig) -> Result<(), I3cDrvError> {
+        if !config.is_secondary {
+            return Err(I3cDrvError::Invalid);
+        }
+        let hj_support = self.i3c.i3cd008().read().slvhjcap().bit();
+        if !hj_support {
+            return Err(I3cDrvError::Invalid);
+        }
+
+        let addr_valid = self.i3c.i3cd004().read().dynamic_addr_valid().bit();
+        if addr_valid {
+            return Err(I3cDrvError::Access);
+        }
+
+        self.i3c.i3cd038().write(|w| unsafe { w.bits(8) }); // set HJ request
+
+        Ok(())
+    }
+
     fn target_handle_response_ready(&mut self, config: &mut I3cConfig) {
         let nresp = self.i3c.i3cd04c().read().respbufblr().bits();
 
@@ -2022,7 +2041,11 @@ impl<I3C: Instance, L: Logger> HardwareInterface for Ast1060I3c<I3C, L> {
             if rx_len != 0 {
                 let mut buf: [u8; 256] = [0u8; 256];
                 self.rd_rx_fifo(&mut buf[..rx_len]);
-                i3c_debug!(self.logger, "Response data: {:02x?}", &buf[..rx_len]);
+                i3c_debug!(
+                    self.logger,
+                    "[MASTER ==> TARGET] TARGET READ: {:02x?}",
+                    &buf[..rx_len]
+                );
             }
 
             if tid == Tid::TargetIbi as usize {
@@ -2042,7 +2065,6 @@ impl<I3C: Instance, L: Logger> HardwareInterface for Ast1060I3c<I3C, L> {
         notifier: &mut I3cIbi,
     ) -> Result<(), I3cDrvError> {
         let reg = self.i3c.i3cd038().read().bits();
-        i3c_debug!(self.logger, "target_pending_read_notify: reg=0x{:08x}", reg);
         if !(config.sir_allowed_by_sw && (reg & SLV_EVENT_CTRL_SIR_EN != 0)) {
             return Err(I3cDrvError::Access);
         }

src/i3c/ast1060_i3c.rs

@@ -54,7 +54,6 @@ impl<HW: HardwareInterface, L: crate::common::Logger> DynamicAddressable for I3c
 
 impl<HW: HardwareInterface, L: crate::common::Logger> IBICapable for I3cController<HW, L> {
     fn wants_ibi(&self) -> bool {
-        // In ast1060, we don't need to tell the controller that we want IBI
         true
     }
 

src/i3c/i3c_target.rs

@@ -1731,10 +1731,10 @@ paste! {
     pub const PINCTRL_I3C2: &[PinctrlPin] = &[PIN_SCU418_20, PIN_SCU418_21, CLR_PIN_SCU4B8_12, CLR_PIN_SCU4B8_13];
     pub const PINCTRL_I3C3: &[PinctrlPin] = &[PIN_SCU418_22, PIN_SCU418_23, CLR_PIN_SCU4B8_14, CLR_PIN_SCU4B8_15];
 
-    pub const PINCTRL_HVI3C0: &[PinctrlPin] = &[CLR_PIN_SCU418_8,  CLR_PIN_SCU418_9,  CLR_PIN_SCU418_16, PIN_SCU418_17, PIN_SCU4B8_8,  PIN_SCU4B8_9];
-    pub const PINCTRL_HVI3C1: &[PinctrlPin] = &[CLR_PIN_SCU418_10, CLR_PIN_SCU418_11, CLR_PIN_SCU418_18, PIN_SCU418_19, PIN_SCU4B8_10, PIN_SCU4B8_11];
-    pub const PINCTRL_HVI3C2: &[PinctrlPin] = &[CLR_PIN_SCU418_12, CLR_PIN_SCU418_13, CLR_PIN_SCU418_20, PIN_SCU418_21, PIN_SCU4B8_12, PIN_SCU4B8_13];
-    pub const PINCTRL_HVI3C3: &[PinctrlPin] = &[CLR_PIN_SCU418_14, CLR_PIN_SCU418_15, CLR_PIN_SCU418_22, PIN_SCU418_23, PIN_SCU4B8_14, PIN_SCU4B8_15];
+    pub const PINCTRL_HVI3C0: &[PinctrlPin] = &[CLR_PIN_SCU418_8,  CLR_PIN_SCU418_9,  CLR_PIN_SCU418_16, CLR_PIN_SCU418_17, PIN_SCU4B8_8,  PIN_SCU4B8_9];
+    pub const PINCTRL_HVI3C1: &[PinctrlPin] = &[CLR_PIN_SCU418_10, CLR_PIN_SCU418_11, CLR_PIN_SCU418_18, CLR_PIN_SCU418_19, PIN_SCU4B8_10, PIN_SCU4B8_11];
+    pub const PINCTRL_HVI3C2: &[PinctrlPin] = &[CLR_PIN_SCU418_12, CLR_PIN_SCU418_13, CLR_PIN_SCU418_20, CLR_PIN_SCU418_21, PIN_SCU4B8_12, PIN_SCU4B8_13];
+    pub const PINCTRL_HVI3C3: &[PinctrlPin] = &[CLR_PIN_SCU418_14, CLR_PIN_SCU418_15, CLR_PIN_SCU418_22, CLR_PIN_SCU418_23, PIN_SCU4B8_14, PIN_SCU4B8_15];
 
     pub const PINCTRL_GPIOA0: &[PinctrlPin] = &[CLR_PIN_SCU410_0, CLR_PIN_SCU4B0_0, CLR_PIN_SCU690_0];
     pub const PINCTRL_GPIOA1: &[PinctrlPin] = &[CLR_PIN_SCU410_1, CLR_PIN_SCU4B0_1, CLR_PIN_SCU690_1];

src/pinctrl.rs

@@ -206,17 +206,28 @@ pub fn test_i3c_target(uart: &mut UartController<'_>) {
         c.i3c_pp_scl_lo_period_ns = 36;
         c.i3c_od_scl_hi_period_ns = 0;
         c.i3c_od_scl_lo_period_ns = 0;
-        c.sda_tx_hold_ns = 20;
+        c.sda_tx_hold_ns = 0;
+        // c.sda_tx_hold_ns = 20;
         c.dcr = 0xcc;
         c.target_config = Some(I3cTargetConfig::new(0, Some(0), 0xae));
     }
     let mut ibi_cons = i3c_ibi_workq_consumer(ctrl.hw.bus_num() as usize);
     ctrl.init();
-    let dyn_addr = 9;
+    let dyn_addr = 8;
     let dev_idx = 0;
     let _ = ctrl.hw.attach_i3c_dev(dev_idx, dyn_addr);
+    writeln!(
+        uart,
+        "I3C target dev at slot {dev_idx}, dyn addr {dyn_addr}\r"
+    )
+    .unwrap();
     // Dump I3C2 registers
     // dump_i3c_controller_registers(uart, 0x7e7a_4000);
+    let mut delay = DummyDelay {};
+    delay.delay_ns(4_000_000_000);
+    writeln!(uart, "waiting for dynamic address assignment...\r").unwrap();
+    let _ = ctrl.hw.target_ibi_raise_hj(&mut ctrl.config);
+    // dump_i3c_controller_registers(uart, 0x7e7a_4000);
     loop {
         if let Some(work) = ibi_cons.dequeue() {
             match work {
@@ -254,9 +265,11 @@ pub fn test_i3c_target(uart: &mut UartController<'_>) {
             *b = u8::try_from(i).unwrap();
         }
         writeln!(uart, "send ibi #{ibi_count}\r").unwrap();
+        writeln!(uart, "[MASTER <== TARGET] TARGET WRITE: {data:02x?}").unwrap();
+        writeln!(uart, "\r").unwrap();
         ctrl.get_ibi_payload(&mut data).unwrap();
         ibi_count += 1;
-        if ibi_count > 100 {
+        if ibi_count > 10 {
             break;
         }
     }