Add i2c.rs for hal.

Author: lxuxx

src/i2c/i2ccontroller.rs src/i2c/ast1060_i2c.rssrc/i2c/i2ccontroller.rs renamed to src/i2c/ast1060_i2c.rs

@@ -1,4 +1,5 @@
 use crate::common::{DmaBuffer, DummyDelay};
+use crate::i2c::common::{I2cConfig, I2cSEvent, I2cXferMode};
 use crate::uart::UartController;
 use ast1060_pac::{I2cbuff, I2cglobal, Scu};
 use core::cmp::min;
@@ -11,31 +12,6 @@ use proposed_traits::i2c_target::I2CTarget;
 
 static I2CGLOBAL_INIT: AtomicBool = AtomicBool::new(false);
 
-#[derive(Copy, Clone, Debug, PartialEq, Eq)]
-#[repr(u32)]
-pub enum I2cSpeed {
-    Standard = 100_000,
-    Fast = 400_000,
-    FastPlus = 1_000_000,
-}
-
-#[derive(Copy, Clone, Debug, PartialEq, Eq)]
-#[repr(u8)]
-pub enum I2cXferMode {
-    DmaMode,
-    BuffMode,
-    ByteMode,
-}
-#[derive(Copy, Clone, Debug, PartialEq, Eq)]
-#[repr(u8)]
-pub enum I2cSEvent {
-    SlaveRdReq,
-    SlaveWrReq,
-    SlaveRdProc,
-    SlaveWrRecvd,
-    SlaveStop,
-}
-
 pub trait Instance {
     fn ptr() -> *const ast1060_pac::i2c::RegisterBlock;
     fn buff_ptr() -> *const ast1060_pac::i2cbuff::RegisterBlock;
@@ -238,78 +214,6 @@ impl embedded_hal::i2c::Error for Error {
     }
 }
 
-pub struct TimingConfig {
-    pub manual_scl_high: u8,
-    pub manual_scl_low: u8,
-    pub manual_sda_hold: u8,
-    pub clk_src: u32,
-}
-pub struct I2cConfig {
-    pub xfer_mode: I2cXferMode,
-    pub multi_master: bool,
-    pub smbus_timeout: bool,
-    pub smbus_alert: bool,
-    pub timing_config: TimingConfig,
-    pub speed: I2cSpeed,
-}
-pub struct I2cConfigBuilder {
-    xfer_mode: I2cXferMode,
-    multi_master: bool,
-    smbus_timeout: bool,
-    smbus_alert: bool,
-    timing_config: Option<TimingConfig>,
-    speed: I2cSpeed,
-}
-impl I2cConfigBuilder {
-    pub fn new() -> Self {
-        Self {
-            xfer_mode: I2cXferMode::ByteMode,
-            multi_master: false,
-            smbus_alert: false,
-            smbus_timeout: false,
-            timing_config: None,
-            speed: I2cSpeed::Standard,
-        }
-    }
-    pub fn xfer_mode(mut self, mode: I2cXferMode) -> Self {
-        self.xfer_mode = mode;
-        self
-    }
-    pub fn multi_master(mut self, enabled: bool) -> Self {
-        self.multi_master = enabled;
-        self
-    }
-    pub fn smbus_alert(mut self, enabled: bool) -> Self {
-        self.smbus_alert = enabled;
-        self
-    }
-    pub fn smbus_timeout(mut self, enabled: bool) -> Self {
-        self.smbus_timeout = enabled;
-        self
-    }
-    pub fn speed(mut self, speed: I2cSpeed) -> Self {
-        self.speed = speed;
-        self
-    }
-    pub fn timing_config(mut self, config: TimingConfig) -> Self {
-        self.timing_config = Some(config);
-        self
-    }
-    pub fn build(self) -> I2cConfig {
-        I2cConfig { 
-            xfer_mode: self.xfer_mode,
-            multi_master: self.multi_master,
-            smbus_timeout: self.smbus_timeout,
-            smbus_alert: self.smbus_alert,
-            timing_config: self.timing_config.unwrap_or(TimingConfig { 
-                manual_scl_high: 0,
-                manual_scl_low: 0,
-                manual_sda_hold: 0,
-                clk_src: 0, 
-            }),
-            speed: self.speed }
-    }
-}
 
 const I2C_TOTAL: usize = 4;
 #[link_section = ".ram_nc"]

src/i2c/common.rs

@@ -0,0 +1,98 @@
+
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
+#[repr(u32)]
+pub enum I2cSpeed {
+    Standard = 100_000,
+    Fast = 400_000,
+    FastPlus = 1_000_000,
+}
+
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum I2cXferMode {
+    DmaMode,
+    BuffMode,
+    ByteMode,
+}
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum I2cSEvent {
+    SlaveRdReq,
+    SlaveWrReq,
+    SlaveRdProc,
+    SlaveWrRecvd,
+    SlaveStop,
+}
+
+pub struct TimingConfig {
+    pub manual_scl_high: u8,
+    pub manual_scl_low: u8,
+    pub manual_sda_hold: u8,
+    pub clk_src: u32,
+}
+pub struct I2cConfig {
+    pub xfer_mode: I2cXferMode,
+    pub multi_master: bool,
+    pub smbus_timeout: bool,
+    pub smbus_alert: bool,
+    pub timing_config: TimingConfig,
+    pub speed: I2cSpeed,
+}
+pub struct I2cConfigBuilder {
+    xfer_mode: I2cXferMode,
+    multi_master: bool,
+    smbus_timeout: bool,
+    smbus_alert: bool,
+    timing_config: Option<TimingConfig>,
+    speed: I2cSpeed,
+}
+impl I2cConfigBuilder {
+    pub fn new() -> Self {
+        Self {
+            xfer_mode: I2cXferMode::ByteMode,
+            multi_master: false,
+            smbus_alert: false,
+            smbus_timeout: false,
+            timing_config: None,
+            speed: I2cSpeed::Standard,
+        }
+    }
+    pub fn xfer_mode(mut self, mode: I2cXferMode) -> Self {
+        self.xfer_mode = mode;
+        self
+    }
+    pub fn multi_master(mut self, enabled: bool) -> Self {
+        self.multi_master = enabled;
+        self
+    }
+    pub fn smbus_alert(mut self, enabled: bool) -> Self {
+        self.smbus_alert = enabled;
+        self
+    }
+    pub fn smbus_timeout(mut self, enabled: bool) -> Self {
+        self.smbus_timeout = enabled;
+        self
+    }
+    pub fn speed(mut self, speed: I2cSpeed) -> Self {
+        self.speed = speed;
+        self
+    }
+    pub fn timing_config(mut self, config: TimingConfig) -> Self {
+        self.timing_config = Some(config);
+        self
+    }
+    pub fn build(self) -> I2cConfig {
+        I2cConfig { 
+            xfer_mode: self.xfer_mode,
+            multi_master: self.multi_master,
+            smbus_timeout: self.smbus_timeout,
+            smbus_alert: self.smbus_alert,
+            timing_config: self.timing_config.unwrap_or(TimingConfig { 
+                manual_scl_high: 0,
+                manual_scl_low: 0,
+                manual_sda_hold: 0,
+                clk_src: 0, 
+            }),
+            speed: self.speed }
+    }
+}

src/i2c/i2c.rs

@@ -0,0 +1,81 @@
+use crate::uart::UartController;
+use crate::i2c::common::I2cConfig;
+use embedded_hal::i2c::{Operation, SevenBitAddress};
+use embedded_io::Write;
+
+trait HardwareInterface {
+    type Error: embedded_hal::i2c::Error + core::fmt::Debug;
+    
+    // Methods return hardware-specific errors
+    fn reset(&mut self);
+    fn configure_timing(&mut self, config: &I2cConfig) -> Result<(), Self::Error>;
+    fn enable_interrupts(&mut self, mask: u32);
+    fn clear_interrupts(&mut self, mask: u32);
+    //fn start_transfer(&mut self, state: &TransferState, mode: TransferMode) -> Result<(), Self::Error>;
+    //fn handle_interrupt(&mut self) -> InterruptStatus;
+    fn is_bus_busy(&self) -> bool;
+    fn recover_bus(&mut self) -> Result<(), Self::Error>;
+
+
+    
+}
+
+trait Logger {
+    fn debug(&mut self, msg: &str);
+    fn error(&mut self, msg: &str);
+}
+
+// No-op implementation for production builds
+struct NoOpLogger;
+impl Logger for NoOpLogger {
+    fn debug(&mut self, _msg: &str) {}
+    fn error(&mut self, _msg: &str) {}
+}
+
+// UART logger adapter (separate concern)
+struct UartLogger<'a> {
+    uart: &'a mut UartController<'a>,
+}
+
+impl<'a> Logger for UartLogger<'a> {
+    fn debug(&mut self, msg: &str) {
+        writeln!(self.uart, "{}", msg).ok();
+    }
+    fn error(&mut self, msg: &str) {
+        writeln!(self.uart, "ERROR: {}", msg).ok();
+    }
+}
+pub struct I2cController<H: HardwareInterface, L: Logger = NoOpLogger> {
+    hardware: H,
+    logger: L,
+}
+
+impl<H: HardwareInterface, L: Logger> embedded_hal::i2c::ErrorType for I2cController<H, L> {
+    type Error = H::Error;
+}
+impl<H: HardwareInterface, L: Logger> embedded_hal::i2c::I2c for I2cController<H, L> {
+    fn read(&mut self, addr: SevenBitAddress, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        self.hardware.read(addr, buffer)
+    }
+
+    fn write(&mut self, addr: SevenBitAddress, bytes: &[u8]) -> Result<(), Self::Error> {
+        self.hardware.write(addr, bytes)
+    }
+
+    fn write_read(
+        &mut self,
+        addr: SevenBitAddress,
+        bytes: &[u8],
+        buffer: &mut [u8],
+    ) -> Result<(), Self::Error> {
+        self.hardware.write_read(addr, bytes, buffer)
+    }
+
+    fn transaction(
+        &mut self,
+        addr: SevenBitAddress,
+        operations: &mut [Operation<'_>],
+    ) -> Result<(), Self::Error> {
+        self.hardware.transaction_slice(addr, operations)
+    }
+}

src/i2c/mod.rs

@@ -1 +1,3 @@
-pub mod i2ccontroller;
+pub mod common;
+pub mod ast1060_i2c;
+//pub mod i2c;

src/tests/functional/i2c_test.rs

@@ -1,7 +1,8 @@
 use crate::pinctrl;
 use crate::uart::{self, Config, UartController};
 use crate::common::DummyDelay;
-use crate::i2c::i2ccontroller::{I2cConfigBuilder, I2cController, I2cSpeed, I2cXferMode};
+use crate::i2c::ast1060_i2c::I2cController;
+use crate::i2c::common::{I2cSpeed, I2cXferMode, I2cConfigBuilder};
 use ast1060_pac::Peripherals;
 use embedded_hal::delay::DelayNs;
 use embedded_hal::i2c::ErrorKind;