[test] Introduce a Mock implementation of the lower level I2C Hardware traits.

- Configurable success/failure behavior for testing error paths
- Event injection system for simulating slave events
- Data injection for testing slave receive scenarios
- Buffer management with realistic size constraints
- State tracking for all operations

Author: rusty1968

.github/workflows/ci.yml

@@ -125,7 +125,24 @@ jobs:
           -W clippy::panic \
           -W clippy::mem_forget \
           -W clippy::multiple_unsafe_ops_per_block \
-          -W clippy::undocumented_unsafe_blocks
+          -W clippy::undocumented_unsafe_blocks \
+          -A clippy::assertions_on_constants \
+          -A clippy::needless_return
+    
+    - name: Run strict security lints on non-test code
+      run: |
+        cargo clippy --lib --bins -- \
+          -D warnings \
+          -D clippy::arithmetic_side_effects \
+          -D clippy::float_arithmetic \
+          -D clippy::indexing_slicing \
+          -D clippy::unwrap_used \
+          -D clippy::expect_used \
+          -D clippy::panic \
+          -D clippy::mem_forget \
+          -D clippy::multiple_unsafe_ops_per_block \
+          -D clippy::undocumented_unsafe_blocks \
+          -D clippy::assertions_on_constants
     
     - name: Run semgrep security scan
       uses: returntocorp/semgrep-action@v1

Cargo.toml

@@ -23,6 +23,6 @@ repository = "https://github.com/rusty1968/openprot"
 edition = "2021"
 
 [workspace.dependencies]
-zerocopy = { version = "0.8.27", features = ["derive"] }
+zerocopy = { version = "0.8", features = ["derive"] }
 zeroize = { version = "1.7", default-features = false, features = ["derive"] }
-subtle = { version = "2.5", default-features = false }
+subtle = { version = "2", default-features = false }

hal/blocking/src/i2c_hardware.rs

@@ -32,7 +32,7 @@
 //!
 //! For non-blocking slave operations, see `openprot-hal-nb::i2c_hardware`.
 
-use embedded_hal::i2c::{Operation, SevenBitAddress};
+use embedded_hal::i2c::{AddressMode, Operation, SevenBitAddress};
 
 /// Core I2C hardware interface providing basic operations
 ///
@@ -45,11 +45,38 @@ pub trait I2cHardwareCore {
     /// Hardware-specific configuration type for I2C initialization and setup
     type Config;
 
+    /// I2C speed configuration type
+    type I2cSpeed;
+
+    /// Timing configuration type
+    type TimingConfig;
+
     /// Initialize the I2C hardware with the given configuration
     fn init(&mut self, config: &mut Self::Config);
 
     /// Configure timing parameters (clock speed, setup/hold times)
-    fn configure_timing(&mut self, config: &mut Self::Config);
+    ///
+    /// Takes timing parameters as input and returns the calculated clock source frequency.
+    /// This provides type safety by making clear what is read vs. what is computed/returned.
+    ///
+    /// # Arguments
+    ///
+    /// * `speed` - Target I2C bus speed (Standard, Fast, FastPlus, etc.)
+    /// * `timing` - Timing configuration parameters for setup/hold times
+    ///
+    /// # Returns
+    ///
+    /// Returns the actual calculated clock source frequency in Hz.
+    ///
+    /// # Errors
+    ///
+    /// Returns an error if the requested timing cannot be achieved with the
+    /// available hardware clock sources or if parameters are invalid.
+    fn configure_timing(
+        &mut self,
+        speed: Self::I2cSpeed,
+        timing: &Self::TimingConfig,
+    ) -> Result<u32, Self::Error>;
 
     /// Enable hardware interrupts with the specified mask
     fn enable_interrupts(&mut self, mask: u32);
@@ -137,9 +164,9 @@ pub mod slave {
     /// This trait provides the fundamental slave operations that all slave
     /// implementations need: setting slave address and enabling/disabling slave mode.
     /// This is the minimal trait for any I2C slave implementation.
-    pub trait I2cSlaveCore: super::I2cHardwareCore {
+    pub trait I2cSlaveCore<A: AddressMode = SevenBitAddress>: super::I2cHardwareCore {
         /// Configure the slave address for this I2C controller
-        fn configure_slave_address(&mut self, addr: SevenBitAddress) -> Result<(), Self::Error>;
+        fn configure_slave_address(&mut self, addr: A) -> Result<(), Self::Error>;
 
         /// Enable slave mode operation
         fn enable_slave_mode(&mut self) -> Result<(), Self::Error>;
@@ -160,7 +187,7 @@ pub mod slave {
     /// Separate from core to allow different buffer management strategies.
     /// Implementations can choose different buffering approaches (ring buffer,
     /// simple array, DMA, etc.) while maintaining the same interface.
-    pub trait I2cSlaveBuffer: I2cSlaveCore {
+    pub trait I2cSlaveBuffer<A: AddressMode = SevenBitAddress>: I2cSlaveCore<A> {
         /// Read received data from the slave buffer
         ///
         /// Returns the number of bytes actually read. The buffer is filled
@@ -204,7 +231,7 @@ pub mod slave {
     ///
     /// Common interrupt and status operations shared by both async and sync event patterns.
     /// This provides the foundation for event-driven slave operations.
-    pub trait I2cSlaveInterrupts: I2cSlaveCore {
+    pub trait I2cSlaveInterrupts<A: AddressMode = SevenBitAddress>: I2cSlaveCore<A> {
         /// Enable slave-specific hardware interrupts
         ///
         /// Configures the hardware to generate interrupts for slave events.
@@ -219,26 +246,26 @@ pub mod slave {
         /// that the interrupt has been handled.
         fn clear_slave_interrupts(&mut self, mask: u32);
 
-        /// Get current slave hardware status
+        /// Current slave hardware status
         ///
         /// Returns comprehensive status information about the slave controller
         /// including enabled state, address, buffer counts, and error conditions.
-        fn get_slave_status(&self) -> Result<SlaveStatus, Self::Error>;
+        fn slave_status(&self) -> Result<SlaveStatus, Self::Error>;
 
-        /// Get the last slave event that occurred
+        /// Last slave event that occurred
         ///
         /// Returns the most recent slave event, useful for debugging
         /// and state tracking. May return None if no events have occurred
         /// since reset or if the hardware doesn't track this information.
-        fn get_last_slave_event(&self) -> Option<I2cSEvent>;
+        fn last_slave_event(&self) -> Option<I2cSEvent>;
     }
 
     /// Blocking slave event handling (sync pattern)
     ///
     /// This trait provides blocking operations suitable for synchronous code
     /// that can afford to wait for events. Operations may block the calling
     /// thread until the requested condition is met or timeout occurs.
-    pub trait I2cSlaveEventSync: I2cSlaveInterrupts {
+    pub trait I2cSlaveEventSync<A: AddressMode = SevenBitAddress>: I2cSlaveInterrupts<A> {
         /// Wait for a specific slave event with timeout
         ///
         /// Blocks until the specified event occurs or the timeout expires.
@@ -272,20 +299,29 @@ pub mod slave {
     /// This trait represents a basic slave implementation that combines
     /// core setup and buffer operations. It's suitable for most simple
     /// slave use cases without requiring event handling.
-    pub trait I2cSlaveBasic: I2cSlaveCore + I2cSlaveBuffer {}
+    pub trait I2cSlaveBasic<A: AddressMode = SevenBitAddress>:
+        I2cSlaveCore<A> + I2cSlaveBuffer<A>
+    {
+    }
 
     /// Blanket implementation: any type implementing core + buffer gets basic slave
-    impl<T> I2cSlaveBasic for T where T: I2cSlaveCore + I2cSlaveBuffer {}
+    impl<T, A: AddressMode> I2cSlaveBasic<A> for T where T: I2cSlaveCore<A> + I2cSlaveBuffer<A> {}
 
     /// Complete sync slave implementation
     ///
     /// This trait represents a full sync slave implementation that supports
     /// all blocking slave operations. Perfect for traditional blocking
     /// implementations that can afford to wait.
-    pub trait I2cSlaveSync: I2cSlaveCore + I2cSlaveBuffer + I2cSlaveEventSync {}
+    pub trait I2cSlaveSync<A: AddressMode = SevenBitAddress>:
+        I2cSlaveCore<A> + I2cSlaveBuffer<A> + I2cSlaveEventSync<A>
+    {
+    }
 
     /// Blanket implementation: any type implementing core + buffer + sync events gets sync slave
-    impl<T> I2cSlaveSync for T where T: I2cSlaveCore + I2cSlaveBuffer + I2cSlaveEventSync {}
+    impl<T, A: AddressMode> I2cSlaveSync<A> for T where
+        T: I2cSlaveCore<A> + I2cSlaveBuffer<A> + I2cSlaveEventSync<A>
+    {
+    }
 
     /// Combined trait for controllers supporting both master and slave modes
     ///

hal/nb/src/i2c_hardware.rs

@@ -8,16 +8,17 @@
 //! These traits complement the blocking traits in `openprot-hal-blocking` by providing
 //! non-blocking alternatives suitable for async code, main loops, and interrupt handlers.
 
+use embedded_hal::i2c::{AddressMode, SevenBitAddress};
 use openprot_hal_blocking::i2c_hardware::slave::{
     I2cSEvent, I2cSlaveBuffer, I2cSlaveCore, I2cSlaveInterrupts,
 };
 
-/// Non-blocking slave event handling (polling pattern)
+/// Non-blocking slave event handling (async/polling pattern)
 ///
 /// This trait provides non-blocking event operations suitable for async code,
 /// main loops, or interrupt-driven architectures. All operations return
 /// immediately without blocking the caller.
-pub trait I2cSlaveEventPolling: I2cSlaveInterrupts {
+pub trait I2cSlaveEventPolling<A: AddressMode = SevenBitAddress>: I2cSlaveInterrupts<A> {
     /// Check for pending slave events without blocking
     ///
     /// Returns the next available slave event if one is pending, or None
@@ -44,7 +45,13 @@ pub trait I2cSlaveEventPolling: I2cSlaveInterrupts {
 /// This trait represents a full non-blocking slave implementation that supports
 /// all non-blocking slave operations. Perfect for interrupt-driven or
 /// polling-based implementations that cannot afford to block.
-pub trait I2cSlaveNonBlocking: I2cSlaveCore + I2cSlaveBuffer + I2cSlaveEventPolling {}
+pub trait I2cSlaveNonBlocking<A: AddressMode = SevenBitAddress>:
+    I2cSlaveCore<A> + I2cSlaveBuffer<A> + I2cSlaveEventPolling<A>
+{
+}
 
 /// Blanket implementation: any type implementing core + buffer + polling events gets non-blocking slave
-impl<T> I2cSlaveNonBlocking for T where T: I2cSlaveCore + I2cSlaveBuffer + I2cSlaveEventPolling {}
+impl<T, A: AddressMode> I2cSlaveNonBlocking<A> for T where
+    T: I2cSlaveCore<A> + I2cSlaveBuffer<A> + I2cSlaveEventPolling<A>
+{
+}