lcb: Fixed constant mat type (#521)

kper · web-flow · commit 5f804577ef9c · 2025-09-30T13:32:26.000+02:00
diff --git a/vadl/main/resources/templates/lcb/llvm/lib/Target/DAGToDAGISel.cpp b/vadl/main/resources/templates/lcb/llvm/lib/Target/DAGToDAGISel.cpp
@@ -108,7 +108,7 @@ bool [(${namespace})]DAGToDAGISel::trySelect(SDNode *Node)
 
          // Handle rest
          int64_t Imm = ConstNode->getSExtValue();
-         ReplaceNode(Node, selectImm(CurDAG, SDLoc(Node), Imm, XLenVT, *Subtarget));
+         ReplaceNode(Node, selectImm(CurDAG, SDLoc(Node), Imm, VT, *Subtarget));
          return true;
        }
        default:
diff --git a/vadl/test/resources/testSource/sys/aarch64/aarch64-abi.vadl b/vadl/test/resources/testSource/sys/aarch64/aarch64-abi.vadl
@@ -97,7 +97,7 @@ application binary interface ABI for AArch64Temp = {
    {
       MOVZWPos00 { rd = rd, imm16 = (val & 0xFFFF) as Bits<16> }
       MOVKWPos16 { rd = rd, imm16 = ((val >> 16) & 0xFFFF) as Bits<16> }
-      SUBX { rd = rd, rn = 31, rm = rd }
+      SUBW { rd = rd, rn = 31, rm = rd }
    }
 
    /*

Original file line number	Diff line number	Diff line change
`@@ -108,7 +108,7 @@ bool [(${namespace})]DAGToDAGISel::trySelect(SDNode *Node)`
`108`	`108`
`109`	`109`	`// Handle rest`
`110`	`110`	`int64_t Imm = ConstNode->getSExtValue();`
`111`		`- ReplaceNode(Node, selectImm(CurDAG, SDLoc(Node), Imm, XLenVT, *Subtarget));`
	`111`	`+ ReplaceNode(Node, selectImm(CurDAG, SDLoc(Node), Imm, VT, *Subtarget));`
`112`	`112`	`return true;`
`113`	`113`	`}`
`114`	`114`	`default:`
Original file line number	Diff line number	Diff line change
`@@ -97,7 +97,7 @@ application binary interface ABI for AArch64Temp = {`
`97`	`97`	`{`
`98`	`98`	`MOVZWPos00 { rd = rd, imm16 = (val & 0xFFFF) as Bits<16> }`
`99`	`99`	`MOVKWPos16 { rd = rd, imm16 = ((val >> 16) & 0xFFFF) as Bits<16> }`
`100`		`- SUBX { rd = rd, rn = 31, rm = rd }`
	`100`	`+ SUBW { rd = rd, rn = 31, rm = rd }`
`101`	`101`	`}`
`102`	`102`
`103`	`103`	`/*`