@@ -245,15 +245,20 @@ private ExpressionNode buildConstraintDontMatchCheck(List<ExpressionNode> indice
245245 : or (constChecks );
246246 }
247247
248+ /**
249+ * The function returned represents how the read from the acutal resource will be transformed
250+ * to the value the alias read actually returns.
251+ *
252+ * @param definition of the alias definition for which the read function will be generated.
253+ * @return the mapping function.
254+ */
248255 Function getRegisterAliasReadFunc (AliasDefinition definition ) {
249256 var graph = new Graph ("%s Read Behavior" .formatted (definition .viamId ));
250257 graph .setSourceLocation (definition .location ());
251258 currentGraph = graph ;
252259
253260 final var identifier =
254261 viamLowering .generateIdentifier (definition .viamId + "::read" , definition .loc );
255- final var regFileDef = (RegisterDefinition ) Objects .requireNonNull (definition .computedTarget );
256- final var zeroConst = definition .getAnnotation ("zero" , ZeroConstraintAnnotation .class );
257262
258263 DataType resultType ;
259264 // Initially the indices are all fixed arguments specified in the alias definition.
@@ -275,21 +280,23 @@ Function getRegisterAliasReadFunc(AliasDefinition definition) {
275280 0 );
276281 params .add (param );
277282 indices .add (new FuncParamNode (param ));
278- resultType = relType .resultType ().asDataType ();
283+ resultType = getViamType ( relType .resultType () ).asDataType ();
279284 } else {
280- resultType = definition .type ().asDataType ();
285+ resultType = getViamType ( definition .type () ).asDataType ();
281286 }
282287
288+ final var regFileDef = (RegisterDefinition ) Objects .requireNonNull (definition .computedTarget );
283289 var reg = (RegisterTensor ) viamLowering .fetch (regFileDef ).orElseThrow ();
284290 var regReadType = regFileDef .type () instanceof ConcreteRelationType relType
285- ? relType .resultType ().asDataType () : resultType . asDataType () ;
291+ ? relType .resultType ().asDataType () : resultType ;
286292 ExpressionNode regAccess = new ReadRegTensorNode (
287293 reg ,
288294 indices ,
289295 regReadType ,
290296 null
291297 );
292298
299+ final var zeroConst = definition .getAnnotation ("zero" , ZeroConstraintAnnotation .class );
293300 if (zeroConst != null ) {
294301 // Wrap the register read in a conditional read, depending on the indices values.
295302 // Compatibility was already checked by the annotation itself during type checking.
@@ -314,7 +321,7 @@ Function getRegisterAliasReadFunc(AliasDefinition definition) {
314321 return new Function (
315322 identifier ,
316323 params .toArray (vadl .viam .Parameter []::new ),
317- getViamType ( resultType ) ,
324+ resultType ,
318325 graph
319326 );
320327 }
@@ -349,16 +356,16 @@ Procedure getRegisterAliasWriteProc(AliasDefinition definition) {
349356 0 );
350357 params .add (param );
351358 indices .add (new FuncParamNode (param ));
352- resultType = relType .resultType ().asDataType ();
359+ resultType = getViamType ( relType .resultType () ).asDataType ();
353360 } else {
354- resultType = definition .type ().asDataType ();
361+ resultType = getViamType ( definition .type () ).asDataType ();
355362 }
356363
357364 var valueParam = new vadl .viam .Parameter (
358365 viamLowering .generateIdentifier (
359366 identifier .name () + "::value" ,
360367 identifier .location ()),
361- getViamType ( resultType ) ,
368+ resultType ,
362369 1 );
363370 params .add (valueParam );
364371
@@ -1167,7 +1174,7 @@ private ExpressionNode sliceWriteValue(ExpressionNode value,
11671174 consumed += part .size ();
11681175 }
11691176
1170- var mask = slice .mask ().castTo (Type .bits (entireRead .type ().bitWidth ())).toNode ();
1177+ var mask = slice .mask ().castTo (Type .bits (entireRead .type ().bitWidth ())).not (). toNode ();
11711178 var clearedResource = BuiltInCall .of (BuiltInTable .AND , entireRead , mask );
11721179 return BuiltInCall .of (BuiltInTable .OR , clearedResource , Objects .requireNonNull (injected ));
11731180 }
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