Proposal: Sliced Alias Registers

[Jozott00]

Currently alias registers have mainly two purposes:

1. Dynamic constraints on underlying register.

register S: Bits<5> -> Bits<32>
[ zero : X(31) ]
alias register X = S

2. Implicit renaming, so that the used register name depends on the used alias.

Slicing of Source Register

It would be useful to define an alias register that operates only on a slice of the original register:

register A: Bits<64>
alias register B = A(31..0)

Since slices must apply to the innermost index access, the syntax for alias registers must be extended to support parameters. Without parameters, we cannot slice results from indexed register files. For example, in AArch64 this could look like:

register S: Index -> BitsX
[ zero : X(31) ]
alias register X = S
alias register W(i) = X(i)(31..0)

Here, the alias register W uses a parameter i to select from X, and slices the result to extract the lower 32 bits. As W is alias of X, the zero constraint also applies to W.

This syntax also implies that:

register A: Bits<5> -> Bits<64>
alias register B = A

is equivalent to:

alias register B(i) = A(i)

In both cases B is of type Bits<5> -> Bits<64>.

Alias Register Grammar

The grammar and type-checking rules are strict and only allow forms as shown above:

"alias register" identifier { "(" identifier ")" } [":" type ] "=" ( identifier | callIndexExpr )

All parameter identifiers must appear in the right-hand expression. The number of parameters must not exceed the number of index dimensions on the source register. Additionally, only a single slice is allowed at the end of the expression.

[kper]

I like the syntax of alias register W(i) = X(i)(31..0). That's exactly what I need for the replacement.

[AndreasKrall]

I only like the syntax partially. There is no reason to add indexing information or to add identifiers which have no semantics on the left side of the equality operator. I propose to only allow a single identifier on the left side. On the right side instead of using identifiers I would only allow a constant index expression or a * or _ or ? or another symbol. As * is not a unary operator there should be no syntax problems.

alias register W = X(*)(31..0)
alias register Flags = SysReg(5)(31..28)
alias register Zero = Flags(3)

Eventually we need the partial/full read/write annotations.

[Jozott00]

Some constraints of the this slicing:

• Constant index access is only allowed on outer dimensions than the wildcard ones:
  X(1)(2)(*)(*) is allowed, while something like X(1)(*)(2)(*) is not, because (2) is a more inner dimension than the first wild card access.
• Slices may only be applied on the most inner dimension. Given register X: Bits<31><64> it is allowed to use X(*)(31..0) but not X(31..0) as the slice is applied on a multi-dimensional type.

Current implementation limitations:

• Currently it is only possible to define a single slice that acts as truncation (i.e. it's lsb is 0)
• It currently doesn't allow constant index access (inherent from current limitation of alias registers which are currently also not supporting this)

PS: Sorry for the late clarification

[Jozott00]

This state is implemented in #445 and #503