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# Intel® Library for Video Super Resolution (Intel® Library for VSR) README
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This project aims to provide a CPU based implementation of the RAISR (Rapid and Accurate Image Super Resolution) algorithm (https://arxiv.org/pdf/1606.01299.pdf) optimized to achieve beyond real-time performance for 2x upscaling on Intel® Xeon® platforms. It can take a lower resolution image and upscale 2x (e.g 540p to 1080p) and provides better quality results than standard (bicubic) algorithms and a good performance vs quality trade-off as compared to DL-based algorithms like EDSR. The Intel Library for VSR is provided as an FFmpeg plugin inside of a Docker container to help ease testing and deployment burdens. This project is developed using C++ and takes advantage of Intel® Advanced Vector Extension 512 (Intel® AVX-512) where available and newly added Intel® AVX-512FP16 support on Intel® Xeon® 4th Generation (Sapphire Rapids).
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Video Super Resolution coverts video from low resolution to high resolution using traditional image processing or AI-based methods.
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RAISR (Rapid and Accurate Image Super Resolution) algorithm (https://arxiv.org/pdf/1606.01299.pdf) is public AI-based VSR algorithm. The algorithm provides better quality results than standard (bicubic) algorithms and a good performance vs quality trade-off as compared to DL-based algorithms like EDSR.
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We have enhanced the public RAISR algorithm to achieve better visual quality and beyond real-time performance for 2x and 1.5x upscaling on Intel® Xeon® platforms and Intel® GPUs. The Intel Library for VSR is provided as an FFmpeg plugin inside of a Docker container(Docker container only for CPU) to help ease testing and deployment burdens. This project is developed using C++ and takes advantage of Intel® Advanced Vector Extension 512 (Intel® AVX-512) where available and newly added Intel® AVX-512FP16 support on Intel® Xeon® 4th Generation (Sapphire Rapids) and added OpenCL support on Intel® GPUs.
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## How to build
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Please see "How to build.md" to build via scripts or manually.
passes <int> ..FV....... passes to run (1: one pass, 2: two pass) (from 1 to 2) (default 1)
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mode <int> ..FV....... mode for two pass (1: upscale in 1st pass, 2: upscale in 2nd
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pass) (from 1 to 2) (default 1)
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asm <string> ..FV....... x86 asm type: (avx512fp16, avx512 or avx2) (default "avx512fp16")
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mode <int> ..FV....... mode for two pass (1: upscale in 1st pass, 2: upscale in 2nd pass) (from 1 to 2) (default 1)
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asm <string> ..FV....... x86 asm type: (avx512fp16, avx512, avx2 or opencl) (default "avx512fp16")
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platform <int> ..FV....... select the platform (from 0 to INT_MAX) (default 0)
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device <int> ..FV....... select the device (from 0 to INT_MAX) (default 0)
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## Advanced Usage ( through Exposed Parameters )
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The FFmpeg plugin for Intel Library for VSR exposes a number of parameters that can be changed for advanced customization
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### threadcount
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### threadcount (only for CPU)
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Allowable values (1,120), default (20)
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Changes the number of software threads used in the algorithm. Values 1..120 will operate on segments of an image such that efficient threading can greatly increase the performance of the upscale. The value itself is the number of threads allocated.
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Allowable values (1: Randomness, 2: CountOfBitsChanged), default (2 ). For GPU only support 2:CountOfBitsChanged blending.
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The library holds two different functions which blend the initial (cheap) upscaled image with the RAISR filtered image. This can be a means of removing any aggressive or outlying artifacts that get introduced by the filtered image.
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### passes
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The VSR Library requires an x86 processor which has the Advanced Vector Extensions 2 (AVX2) available. AVX2 was first introduced into the Intel Xeon roadmap with Haswell in 2015. Performance can be further increased if the newer AVX-512 Foundation and Vector Length Extensions are available. AVX512 was introduced into the Xeon Scalable Processors (Skylake gen) in 2017. Performance improves again with the introduction of AVX-512FP16, which uses _Float16 instead of float(32bit) with minimal precision and visual quality loss. AVX-512FP16 was introduced into the 4th gen Xeon (Sapphire Rappids) in 2022. The VSR Library will always check for the highest available ISA first, then fallback according to what is available (AVX-512FP16/AVX512/AVX2). However if the use case requires it, this asm parameter allows the default behavior to be changed. User can also choose opencl if the opencl is supported in their system.
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