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Area(DataStorage): change Data SRAM's split to 4 (#432)
Given the new physical-design backend requirements, changing the L2 Data SRAM specification to split = 4 is more favorable for both timing and area.
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src/main/scala/coupledL2/CoupledL2.scala

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,12 +91,12 @@ trait HasCoupledL2Parameters {
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def eccTagBankBits = encTagBankBits - tagBankBits
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def enableDataECC = cacheParams.enableDataECC
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def dataBankSplit = 4
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def dataSRAMSplit = 8
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def dataSRAMSplit = 4
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def wordBits = 64
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def bankWords = blockBits / wordBits / dataBankSplit
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def dataBankBits = wordBits * bankWords
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def encBankBits = cacheParams.dataCode.width(dataBankBits)
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def encDataPadBits = 4 // recaculate if any split changes
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def encDataPadBits = 0 // recaculate if any split changes
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// Prefetch
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def prefetchers = cacheParams.prefetch

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