feat(Store_event): refactor vector store check (#985)

Author: Anzooooo

src/cpu/cpu-exec.c

@@ -837,6 +837,7 @@ void cpu_exec(uint64_t n) {
       cpu.amo = false; // clean up
       cpu.pbmt = 0;
       cpu.isVldst = false;
+      cpu.isVecUnitStore = false;
 
       // No need to settle instruction counting here, as it is done in longjmp handler.
       // It's necessary to flush tcache for exception: addr space may conflict in different priv/mmu mode.

src/isa/riscv64/include/isa-def.h

@@ -156,6 +156,7 @@ typedef struct {
   bool amo;
   uint32_t pbmt;
   bool isVldst;
+  bool isVecUnitStore;
   int mem_exception;
 
 #ifdef CONFIG_TVAL_EX_II

src/isa/riscv64/instr/rvv/vldst_impl.c

@@ -541,10 +541,12 @@ void vst(Decode *s, int mode, int mmu_mode) {
   if (mode == MODE_STRIDED) {
     stride = id_src2->val;
     is_unit_stride = 0;
+    cpu.isVecUnitStore = false;
   } else {
     stride = 0;
     is_unit_stride = 1;
     g_nr_vst_unit += 1;
+    cpu.isVecUnitStore = s->v_nf == 0;
   }
   // previous decode does not load vals for us
   rtl_lr(s, &(s->src1.val), s->src1.reg, 4);
@@ -676,6 +678,7 @@ void vst(Decode *s, int mode, int mmu_mode) {
 
   vstart->val = 0;
   cpu.isVldst = false;
+  cpu.isVecUnitStore = false;
   vp_set_dirty();
 }
 
@@ -842,6 +845,7 @@ void vsr(Decode *s, int mmu_mode) {
 
   isa_whole_reg_check(vd, len);
 
+  cpu.isVecUnitStore = true;
   if (vstart->val < size) {
     vreg_idx = vstart->val / elt_per_reg;
     offset = vstart->val % elt_per_reg;
@@ -881,6 +885,7 @@ void vsr(Decode *s, int mmu_mode) {
 
   vstart->val = 0;
   cpu.isVldst = false;
+  cpu.isVecUnitStore = false;
   vp_set_dirty();
 }
 

src/memory/paddr.c

@@ -578,6 +578,9 @@ void miss_align_store_commit_queue_push(uint64_t addr, uint64_t data, int len) {
   }
 }
 
+#define GEN_BYTE_MASK(len)  ((1ULL << (len)) - 1)
+#define GEN_BIT_MASK(len)   ((len) >= 8 ? (~0ULL) : ((1ULL << ((len) * 8)) - 1))
+
 void store_commit_queue_push(uint64_t addr, uint64_t data, int len, int cross_page_store) {
 #ifndef CONFIG_DIFFTEST_STORE_COMMIT_AMO
   if (cpu.amo) {
@@ -587,14 +590,51 @@ void store_commit_queue_push(uint64_t addr, uint64_t data, int len, int cross_pa
 #ifdef CONFIG_AC_NONE
   uint8_t store_miss_align = (addr & (len - 1)) != 0;
   if (unlikely(store_miss_align)) {
-    if (!cross_page_store) {
+    if (!cross_page_store && !cpu.isVecUnitStore) {
       miss_align_store_commit_queue_push(addr, data, len);
       return;
     }
   }
 #endif // CONFIG_AC_NONE
   Logm("push store addr = " FMT_PADDR ", data = " FMT_WORD ", len = %d", addr, data, len);
  store_commit_t store_commit;
+
+  if (cpu.isVecUnitStore)
+  {
+    bool isCross128Bit = (addr & 0xF) + len > 16;
+
+    if (isCross128Bit)
+    {
+      paddr_t offset_in_block = addr & 0xF;
+      paddr_t space_left = 16 - offset_in_block;
+
+      paddr_t low_addr = addr;
+      uint8_t low_len = space_left;
+      uint16_t low_mask = (1U << low_len) - 1;
+      word_t low_data = data & ((1ULL << low_len * 8) - 1);
+
+      paddr_t  high_addr = addr + space_left;
+      uint8_t high_len = len - space_left;
+      uint16_t high_mask = (1U << high_len) - 1;
+      word_t high_data = data >> (low_len * 8);
+
+      store_commit_t low_store_commit = {low_addr, low_data, low_mask, prev_s->pc};
+      store_commit_t high_store_commit = {high_addr, high_data, high_mask, prev_s->pc};
+
+      store_queue_push(low_store_commit);
+      store_queue_push(high_store_commit);
+
+      return;
+    }
+    store_commit.data = data & GEN_BIT_MASK(len);
+    store_commit.mask = GEN_BYTE_MASK(len);
+    assert(len <= 8);
+    store_commit.addr = addr;
+    store_commit.pc = prev_s->pc;
+
+    store_queue_push(store_commit);
+    return;
+  }
   uint64_t offset = addr % 8ULL;
   store_commit.addr = addr - offset;
   switch (len) {

src/memory/store_queue_wrapper.cpp

@@ -29,6 +29,7 @@ void store_queue_reset() {
 }
 
 void store_queue_push(store_commit_t store_commit) {
+  Logm("push store addr = " FMT_PADDR ", data = " FMT_WORD ", mask = 0x%x", store_commit.addr, store_commit.data, store_commit.mask);
   cpp_store_event_queue.push(store_commit);
 }