fix(tinfo): CPU_XIANGSHAN's Trigger Module support Mcontrol6.

wissygh · wissygh · commit 4866fbb9707f · 2024-09-30T12:15:28.000+08:00
diff --git a/riscv/triggers.cc b/riscv/triggers.cc
@@ -639,7 +639,7 @@ std::optional<match_result_t> module_t::detect_trap_match(const trap_t& t) noexc
 reg_t module_t::tinfo_read(unsigned UNUSED index) const noexcept
 {
 #if defined(DIFFTEST) && defined(CPU_XIANGSHAN)
-  return (1 << CSR_TDATA1_TYPE_MCONTROL) ;
+  return (1 << CSR_TDATA1_TYPE_MCONTROL6) ;
 #else
   /* In spike, every trigger supports the same types. */
   return (1 << CSR_TDATA1_TYPE_MCONTROL) |

Original file line number	Diff line number	Diff line change
`@@ -639,7 +639,7 @@ std::optional<match_result_t> module_t::detect_trap_match(const trap_t& t) noexc`
`639`	`639`	`reg_t module_t::tinfo_read(unsigned UNUSED index) const noexcept`
`640`	`640`	`{`
`641`	`641`	`#if defined(DIFFTEST) && defined(CPU_XIANGSHAN)`
`642`		`- return (1 << CSR_TDATA1_TYPE_MCONTROL) ;`
	`642`	`+ return (1 << CSR_TDATA1_TYPE_MCONTROL6) ;`
`643`	`643`	`#else`
`644`	`644`	`/* In spike, every trigger supports the same types. */`
`645`	`645`	`return (1 << CSR_TDATA1_TYPE_MCONTROL) \|`