@@ -71,7 +71,8 @@ class PaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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framework::LoD abs_offset_lod = framework::ToAbsOffset (lod);
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auto seq_dims = seq.dims ();
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- PADDLE_ENFORCE_EQ (seq_dims[0 ], abs_offset_lod[level].back (),
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+ PADDLE_ENFORCE_EQ (seq_dims[0 ],
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+ static_cast <int64_t >(abs_offset_lod[level].back ()),
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" The first dimension of LoDTensor seq should be "
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" equal to the sum of all sequences's length." );
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@@ -80,17 +81,17 @@ class PaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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" The input padding should be a 3-D Tensor of shape "
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" [max_sequence_length, num_sequences, sequence_width]." );
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- size_t max_sequence_length = MaximumSequenceLength (lod, level);
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+ int64_t max_sequence_length = MaximumSequenceLength (lod, level);
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PADDLE_ENFORCE_EQ (padding_dims[0 ], max_sequence_length,
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" The first dimension of Tensor padding should be the "
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" maximum length of all sequences in LoDTensor seq." );
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- const size_t num_sequences = abs_offset_lod[level].size () - 1 ;
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+ const int64_t num_sequences = abs_offset_lod[level].size () - 1 ;
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PADDLE_ENFORCE_EQ (padding_dims[1 ], num_sequences,
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" The second dimension of Tensor padding should be the "
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" number of sequences in LoDTensor seq." );
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- const size_t sequence_width = seq.numel () / seq_dims[0 ];
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+ const int64_t sequence_width = seq.numel () / seq_dims[0 ];
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PADDLE_ENFORCE_EQ (padding_dims[2 ], sequence_width,
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" The third dimension of Tensor padding should be the "
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" width of sequence in LoDTensor seq." );
@@ -101,7 +102,7 @@ class PaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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return ;
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}
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- const size_t kBlockSize = 512 ;
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+ const int64_t kBlockSize = 512 ;
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/* At least use 32 threads to copy sequence_width elements,
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* and at least 8 elements for each thread.
@@ -143,7 +144,8 @@ class UnpaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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framework::LoD abs_offset_lod = framework::ToAbsOffset (lod);
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auto seq_dims = seq.dims ();
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- PADDLE_ENFORCE_EQ (seq_dims[0 ], abs_offset_lod[level].back (),
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+ PADDLE_ENFORCE_EQ (seq_dims[0 ],
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+ static_cast <int64_t >(abs_offset_lod[level].back ()),
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" The first dimension of LoDTensor seq should be "
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" equal to the sum of all sequences's length." );
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@@ -152,17 +154,17 @@ class UnpaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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" The input padding should be a 3-D Tensor of shape "
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" [max_sequnece_length, num_sequences, sequence_width]." );
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- size_t max_sequence_length = MaximumSequenceLength (lod, level);
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+ int64_t max_sequence_length = MaximumSequenceLength (lod, level);
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PADDLE_ENFORCE_EQ (padding_dims[0 ], max_sequence_length,
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" The first dimension of Tensor padding should be "
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" the maximum length of all sequences in LoDTensor seq." );
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- const size_t num_sequences = abs_offset_lod[level].size () - 1 ;
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+ const int64_t num_sequences = abs_offset_lod[level].size () - 1 ;
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PADDLE_ENFORCE_EQ (padding_dims[1 ], num_sequences,
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" The second dimension of Tensor padding should be "
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" the number of sequences in LoDTensor seq." );
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- const size_t sequence_width = seq.numel () / seq_dims[0 ];
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+ const int64_t sequence_width = seq.numel () / seq_dims[0 ];
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PADDLE_ENFORCE_EQ (padding_dims[2 ], sequence_width,
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" The third dimension of Tensor padding should be the "
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" width of sequence in LoDTensor seq." );
@@ -173,7 +175,7 @@ class UnpaddingLoDTensorFunctor<platform::CUDADeviceContext, T> {
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return ;
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}
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- const size_t kBlockSize = 512 ;
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+ const int64_t kBlockSize = 512 ;
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/* At least use 32 threads to copy sequence_width elements,
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* and at least 8 elements for each thread.
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