@@ -1476,7 +1476,8 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
14761476
14771477 setMinFunctionAlignment(Align(4));
14781478
1479- switch (Subtarget.getCPUDirective()) {
1479+ auto CPUDirective = Subtarget.getCPUDirective();
1480+ switch (CPUDirective) {
14801481 default: break;
14811482 case PPC::DIR_970:
14821483 case PPC::DIR_A2:
@@ -1508,15 +1509,14 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
15081509
15091510 // The Freescale cores do better with aggressive inlining of memcpy and
15101511 // friends. GCC uses same threshold of 128 bytes (= 32 word stores).
1511- if (Subtarget.getCPUDirective() == PPC::DIR_E500mc ||
1512- Subtarget.getCPUDirective() == PPC::DIR_E5500) {
1512+ if (CPUDirective == PPC::DIR_E500mc || CPUDirective == PPC::DIR_E5500) {
15131513 MaxStoresPerMemset = 32;
15141514 MaxStoresPerMemsetOptSize = 16;
15151515 MaxStoresPerMemcpy = 32;
15161516 MaxStoresPerMemcpyOptSize = 8;
15171517 MaxStoresPerMemmove = 32;
15181518 MaxStoresPerMemmoveOptSize = 8;
1519- } else if (Subtarget.getCPUDirective() == PPC::DIR_A2) {
1519+ } else if (CPUDirective == PPC::DIR_A2) {
15201520 // The A2 also benefits from (very) aggressive inlining of memcpy and
15211521 // friends. The overhead of a the function call, even when warm, can be
15221522 // over one hundred cycles.
@@ -1529,6 +1529,11 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
15291529 MaxLoadsPerMemcmpOptSize = 4;
15301530 }
15311531
1532+ // Enable generation of STXVP instructions by default for mcpu=future.
1533+ if (CPUDirective == PPC::DIR_PWR_FUTURE &&
1534+ DisableAutoPairedVecSt.getNumOccurrences() == 0)
1535+ DisableAutoPairedVecSt = false;
1536+
15321537 IsStrictFPEnabled = true;
15331538
15341539 // Let the subtarget (CPU) decide if a predictable select is more expensive
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