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Jit64: Explicitly get imm for clobbered stores
If we're on an x64 CPU that doesn't have the MOVBE extension, trying to SwapAndStore a host register results in that register's value getting clobbered with the swapped value. Jit64::stX and Jit64::stXx detect this case, and if necessary, emit a MOV to a register that's fine to clobber. This logic was broken by the merge of PR 12134. Jit64::stX and Jit64::stXx were assuming that if RegCache::IsImm returns true for a guest register, calling RegCache::Use or RegCache::BindOrImm for that guest register would result in an immediate. However, PR 12134 made it possible for a guest register to have both a host register and an immediate in the register cache at the same time. When this happens, RegCache::IsImm returns true, yet RegCache::Use and RegCache::BindForImm return an RCOpArg whose Location returns a host register. (To make it extra confusing, RCOpArg::IsImm calls RegCache::IsImm if the RCOpArg came from RegCache, so RCOpArg::IsImm returns true!) To fix this, in cases where Jit64::stX and Jit64::stXx explicitly need an immediate to avoid having to emit an extra MOV, let's call RegCache::Imm32 so that we're certain that we're getting an immediate. This fixes an issue on older x64 CPUs that manifested as e.g. completely broken graphics in Spyro: Enter the Dragonfly.
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Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -568,12 +568,19 @@ void Jit64::stX(UGeckoInstruction inst)
568568
{
569569
RCX64Reg Ra = gpr.Bind(a, update ? RCMode::ReadWrite : RCMode::Read);
570570
RCOpArg reg_value;
571-
if (!gpr.IsImm(s) && WriteClobbersRegValue(accessSize, /* swap */ true))
571+
if (WriteClobbersRegValue(accessSize, /* swap */ true))
572572
{
573-
RCOpArg Rs = gpr.Use(s, RCMode::Read);
574-
RegCache::Realize(Rs);
575-
reg_value = RCOpArg::R(RSCRATCH2);
576-
MOV(32, reg_value, Rs);
573+
if (gpr.IsImm(s))
574+
{
575+
reg_value = RCOpArg::Imm32(gpr.Imm32(s));
576+
}
577+
else
578+
{
579+
RCOpArg Rs = gpr.Use(s, RCMode::Read);
580+
RegCache::Realize(Rs);
581+
reg_value = RCOpArg::R(RSCRATCH2);
582+
MOV(32, reg_value, Rs);
583+
}
577584
}
578585
else
579586
{
@@ -624,7 +631,9 @@ void Jit64::stXx(UGeckoInstruction inst)
624631

625632
RCOpArg Ra = update ? gpr.Bind(a, RCMode::ReadWrite) : gpr.Use(a, RCMode::Read);
626633
RCOpArg Rb = gpr.Use(b, RCMode::Read);
627-
RCOpArg Rs = does_clobber ? gpr.Use(s, RCMode::Read) : gpr.BindOrImm(s, RCMode::Read);
634+
RCOpArg Rs = does_clobber ?
635+
(gpr.IsImm(s) ? RCOpArg::Imm32(gpr.Imm32(s)) : gpr.Use(s, RCMode::Read)) :
636+
gpr.BindOrImm(s, RCMode::Read);
628637
RegCache::Realize(Ra, Rb, Rs);
629638

630639
MOV_sum(32, RSCRATCH2, Ra, Rb);

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