Added more sophisticated IRQ handling

The details are described in more detail in the doc comment at
the top of the interrupts module, but IRQs are now handled more
differently from CPU exceptions than they were previously.

Signed-off-by: SlyMarbo <[email protected]>

Author: SlyMarbo

kernel/src/interrupts.rs

@@ -16,6 +16,17 @@
 //    message.
 // 4. Timer: the timer handler increments the counter in
 //    the time module and acknowledges the interrupt.
+//
+// The functionality for the PIC is quite different from
+// the functionality for CPU exceptions. Exceptions are
+// handled directly through the IDT. The PIC's IRQs are
+// instead registered using the register_irq function,
+// making it easier to handle IRQs, without needing to
+// know the details of the PIC.
+//
+// The other big difference with the IRQ handling is that
+// IRQ handlers don't need to acknowledge the PIC, and
+// are passed the IRQ number.
 
 use crate::{gdt, halt_loop, println, time};
 use lazy_static::lazy_static;
@@ -29,6 +40,7 @@ use x86_64::structures::idt::{InterruptDescriptorTable, InterruptStackFrame, Pag
 pub fn init() {
     IDT.load();
     unsafe { PICS.lock().initialize() };
+    register_irq(0, timer_interrupt_handler);
 }
 
 lazy_static! {
@@ -41,7 +53,23 @@ lazy_static! {
                 .set_handler_fn(double_fault_handler)
                 .set_stack_index(gdt::DOUBLE_FAULT_IST_INDEX);
         }
-        idt[InterruptIndex::Timer.as_usize()].set_handler_fn(timer_interrupt_handler);
+
+        idt[PIC_1_OFFSET + 0].set_handler_fn(irq_handler_0);
+        idt[PIC_1_OFFSET + 1].set_handler_fn(irq_handler_1);
+        idt[PIC_1_OFFSET + 2].set_handler_fn(irq_handler_2);
+        idt[PIC_1_OFFSET + 3].set_handler_fn(irq_handler_3);
+        idt[PIC_1_OFFSET + 4].set_handler_fn(irq_handler_4);
+        idt[PIC_1_OFFSET + 5].set_handler_fn(irq_handler_5);
+        idt[PIC_1_OFFSET + 6].set_handler_fn(irq_handler_6);
+        idt[PIC_1_OFFSET + 7].set_handler_fn(irq_handler_7);
+        idt[PIC_1_OFFSET + 8].set_handler_fn(irq_handler_8);
+        idt[PIC_1_OFFSET + 9].set_handler_fn(irq_handler_9);
+        idt[PIC_1_OFFSET + 10].set_handler_fn(irq_handler_10);
+        idt[PIC_1_OFFSET + 11].set_handler_fn(irq_handler_11);
+        idt[PIC_1_OFFSET + 12].set_handler_fn(irq_handler_12);
+        idt[PIC_1_OFFSET + 13].set_handler_fn(irq_handler_13);
+        idt[PIC_1_OFFSET + 14].set_handler_fn(irq_handler_14);
+        idt[PIC_1_OFFSET + 15].set_handler_fn(irq_handler_15);
 
         idt
     };
@@ -71,41 +99,135 @@ extern "x86-interrupt" fn double_fault_handler(
     panic!("EXCEPTION: DOUBLE FAULT\n{:#?}", stack_frame);
 }
 
-extern "x86-interrupt" fn timer_interrupt_handler(_stack_frame: InterruptStackFrame) {
+fn timer_interrupt_handler(_stack_frame: InterruptStackFrame, _irq: u8) {
     time::tick();
+}
+
+// PIC code.
+
+const PIC_1_OFFSET: usize = 32;
+const PIC_2_OFFSET: usize = PIC_1_OFFSET + 8;
+
+/// PICS is the set of programmable interrupt controllers.
+///
+/// PICS can be used to acknowledge an interrupt.
+///
+static PICS: spin::Mutex<ChainedPics> =
+    spin::Mutex::new(unsafe { ChainedPics::new(PIC_1_OFFSET as u8, PIC_2_OFFSET as u8) });
+
+/// IrqHandler represents an IRQ handler function.
+///
+/// The irq argument is an integer between 0 and 15.
+///
+pub type IrqHandler = fn(frame: InterruptStackFrame, irq: u8);
+
+/// irq_handler_none is a dummy IRQ handler, which
+/// does nothing.
+///
+fn irq_handler_none(_frame: InterruptStackFrame, _irq: u8) {}
+
+// IRQ handlers.
+
+#[inline]
+fn irq_handler_generic(frame: InterruptStackFrame, irq: u8) {
+    let irqs = IRQS.try_lock();
+    if let Some(irqs) = irqs {
+        let handler = irqs[irq as usize];
+        handler(frame, irq);
+    }
 
     unsafe {
         PICS.lock()
-            .notify_end_of_interrupt(InterruptIndex::Timer.as_u8());
+            .notify_end_of_interrupt(irq + PIC_1_OFFSET as u8);
     }
 }
 
-// PIC code.
+extern "x86-interrupt" fn irq_handler_0(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 0u8);
+}
 
-#[doc(hidden)]
-pub const PIC_1_OFFSET: u8 = 32;
-#[doc(hidden)]
-pub const PIC_2_OFFSET: u8 = PIC_1_OFFSET + 8;
+extern "x86-interrupt" fn irq_handler_1(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 1u8);
+}
 
-static PICS: spin::Mutex<ChainedPics> =
-    spin::Mutex::new(unsafe { ChainedPics::new(PIC_1_OFFSET, PIC_2_OFFSET) });
+extern "x86-interrupt" fn irq_handler_2(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 2u8);
+}
+
+extern "x86-interrupt" fn irq_handler_3(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 3u8);
+}
+
+extern "x86-interrupt" fn irq_handler_4(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 4u8);
+}
+
+extern "x86-interrupt" fn irq_handler_5(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 5u8);
+}
+
+extern "x86-interrupt" fn irq_handler_6(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 6u8);
+}
+
+extern "x86-interrupt" fn irq_handler_7(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 7u8);
+}
 
-#[derive(Debug, Clone, Copy)]
-#[repr(u8)]
-#[doc(hidden)]
-pub enum InterruptIndex {
-    Timer = PIC_1_OFFSET,
-    Keyboard,
+extern "x86-interrupt" fn irq_handler_8(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 8u8);
 }
 
-impl InterruptIndex {
-    fn as_u8(self) -> u8 {
-        self as u8
+extern "x86-interrupt" fn irq_handler_9(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 9u8);
+}
+
+extern "x86-interrupt" fn irq_handler_10(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 10u8);
+}
+
+extern "x86-interrupt" fn irq_handler_11(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 11u8);
+}
+
+extern "x86-interrupt" fn irq_handler_12(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 12u8);
+}
+
+extern "x86-interrupt" fn irq_handler_13(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 13u8);
+}
+
+extern "x86-interrupt" fn irq_handler_14(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 14u8);
+}
+
+extern "x86-interrupt" fn irq_handler_15(frame: InterruptStackFrame) {
+    irq_handler_generic(frame, 15u8);
+}
+
+/// IRQS helps us to track which IRQs have been allocated.
+///
+static IRQS: spin::Mutex<[IrqHandler; 16]> = spin::Mutex::new([irq_handler_none; 16]);
+
+/// register_irq sets the handler for the given IRQ.
+///
+/// The irq parameter must be an integer between 0 and 15.
+///
+/// If the given IRQ has already been assigned, register_irq
+/// panics.
+///
+pub fn register_irq(irq: u8, handler: IrqHandler) {
+    let mut irqs = IRQS.lock();
+    if irq > 15 {
+        panic!("invalid IRQ {} passed to register_irq", irq);
     }
 
-    fn as_usize(self) -> usize {
-        usize::from(self.as_u8())
+    if irqs[irq as usize] != irq_handler_none {
+        panic!("IRQ {} has already been registered", irq);
     }
+
+    irqs[irq as usize] = handler;
 }
 
 // Tests