Template module.jinja was split as wrap.jinja and stub.jinja

Author: rodrigomelo9

hdltools/apps/genstub.py

@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 #
 
-"""This script generates an stub for the specified module."""
+"""This script generates a stub for the specified module."""
 
 import argparse
 import logging
@@ -36,10 +36,9 @@
 module = modules.get_module(args.top)
 module['name'] = args.top
 module['suffix'] = args.suffix
-module['stub'] = True
 
 top = GenFile()
-top.render('module', module)
+top.render('stub', module)
 
 if not args.output:
     print(top)

hdltools/apps/genwrap.py

@@ -38,7 +38,7 @@
 module['suffix'] = args.suffix
 
 top = GenFile()
-top.render('module', module)
+top.render('wrap', module)
 
 if not args.output:
     print(top)

hdltools/templates/stub.jinja

@@ -0,0 +1,43 @@
+{%- set all_ports = [] %}
+{%- set port_names = [] %}
+{%- for direction, signals in ports.items() %}
+  {%- for name, props in signals.items() %}
+    {%- set dir = direction.rstrip('s') %}
+    {%- set type = props.type | default('') %}
+    {%- set packed = props.packed | default('') %}
+    {%- set unpacked = props.unpacked | default('') %}
+    {%- set port_str = dir ~ " " ~ type ~ " " ~ packed ~ " " ~ name ~ " " ~ unpacked %}
+    {%- set _ = all_ports.append(port_str) %}
+    {%- set _ = port_names.append(name) %}
+  {%- endfor %}
+{%- endfor -%}
+module {{ name }}{{ suffix }} {% if params -%}#(
+  {%- for name, props in params.items() -%}
+    {%- set type = props.type | default('') %}
+    {%- set packed = props.packed | default('') %}
+  parameter {{ type }} {{ packed }} {{ name }} = {{ props.value }}{% if not loop.last %},{% endif %}
+  {%- endfor %}
+){% endif %}(
+{%- for port in all_ports %}
+  {{ port }}{% if not loop.last %},{% endif %}
+{%- endfor %}
+);
+{% if ports.outputs %}
+  {%- for name, props in ports.outputs.items() %}
+    {%- if props.type == "reg" %}
+  always_comb {{ name }} = '0;
+    {%- else %}
+  assign {{ name }} = '0;
+    {%- endif %}
+  {%- endfor %}
+{% endif %}
+{% if ports.inouts %}
+  {%- for name, props in ports.inouts.items() %}
+    {%- if props.type == "reg" %}
+  always_comb {{ name }} = 'Z;
+    {%- else %}
+  assign {{ name }} = 'Z;
+    {%- endif %}
+  {%- endfor %}
+{% endif %}
+endmodule

hdltools/templates/module.jinja hdltools/templates/wrap.jinjahdltools/templates/module.jinja renamed to hdltools/templates/wrap.jinja

@@ -3,7 +3,7 @@
 {%- for direction, signals in ports.items() %}
   {%- for name, props in signals.items() %}
     {%- set dir = direction.rstrip('s') %}
-    {%- set type = props.type | default('') %}
+    {%- set type = "wire" %}
     {%- set packed = props.packed | default('') %}
     {%- set unpacked = props.unpacked | default('') %}
     {%- set port_str = dir ~ " " ~ type ~ " " ~ packed ~ " " ~ name ~ " " ~ unpacked %}
@@ -23,35 +23,14 @@ module {{ name }}{{ suffix }} {% if params -%}#(
 {%- endfor %}
 );
 
-{%- if stub %}
-  {%- if ports.outputs %}
-    {%- for name, props in ports.outputs.items() %}
-      {%- if props.type == "reg" %}
-  always_comb {{ name }} = '0;
-      {%- else %}
-  assign {{ name }} = '0;
-      {%- endif %}
-    {%- endfor %}
-  {%- endif %}
-  {%- if ports.inouts %}
-    {%- for name, props in ports.inouts.items() %}
-      {%- if props.type == "reg" %}
-  always_comb {{ name }} = 'Z;
-      {%- else %}
-  assign {{ name }} = 'Z;
-      {%- endif %}
-    {%- endfor %}
-  {%- endif %}
-{%- else %}
   {{ name }} {% if params %}#(
-  {%- for name, props in params.items() %}
+{%- for name, props in params.items() %}
     .{{ name }} ({{ name }}){% if not loop.last %},{% endif %}
-  {%- endfor %}
+{%- endfor %}
   ){% endif %} {{ name }} (
-  {%- for port_name in port_names %}
+{%- for port_name in port_names %}
     .{{ port_name }} ({{ port_name }}){% if not loop.last %},{% endif %}
-  {%- endfor %}
+{%- endfor %}
   );
-{%- endif %}
 
 endmodule