ghdl: added a more concise alternative

Author: rodrigomelo9

ghdl-yosys/Makefile

@@ -0,0 +1,9 @@
+#!/usr/bin/make
+
+COMMAND=bash
+
+vlog1 vlog2 vhdl1 vhdl2:
+	$(COMMAND) $@.sh
+
+clean:
+	rm -fr *.asc *.bit *.cf *.edif *.json *.pcf

ghdl-yosys/vhdl1.sh

@@ -0,0 +1,22 @@
+#!/bin/bash
+
+set -e
+
+DOCKER="docker run --rm -v $HOME:$HOME -w $PWD"
+HDL=../resources/mix
+CONSTRAINT=../../resources/constraints/icestick
+
+rm -fr *.cf *.json
+
+VHDL_FILES=$HDL/top.vhdl
+VLOG_FILES=$HDL/blink.v
+
+$DOCKER hdlc/ghdl:yosys yosys -Q -m ghdl -p "
+ghdl $VHDL_FILES -e;
+read_verilog $VLOG_FILES;
+synth_ice40 -top Top -json blink.json
+"
+
+cat $CONSTRAINT/clk.pcf $CONSTRAINT/led.pcf > icestick.pcf
+$DOCKER hdlc/nextpnr:ice40 nextpnr-ice40 --json blink.json --hx8k --package tq144:4k --pcf icestick.pcf --asc blink.asc
+$DOCKER hdlc/icestorm icepack blink.asc blink.bit

ghdl-yosys/vlog1.sh

@@ -0,0 +1,22 @@
+#!/bin/bash
+
+set -e
+
+DOCKER="docker run --rm -v $HOME:$HOME -w $PWD"
+HDL=../resources/mix
+CONSTRAINT=../../resources/constraints/icestick
+
+rm -fr *.cf *.json
+
+VHDL_FILES=$HDL/blink.vhdl
+VLOG_FILES=$HDL/top.v
+
+$DOCKER hdlc/ghdl:yosys yosys -Q -m ghdl -p "
+ghdl $VHDL_FILES -e;
+read_verilog $VLOG_FILES;
+synth_ice40 -top Top -json blink.json
+"
+
+cat $CONSTRAINT/clk.pcf $CONSTRAINT/led.pcf > icestick.pcf
+$DOCKER hdlc/nextpnr:ice40 nextpnr-ice40 --json blink.json --hx8k --package tq144:4k --pcf icestick.pcf --asc blink.asc
+$DOCKER hdlc/icestorm icepack blink.asc blink.bit

ghdl/vhdl.sh

@@ -2,11 +2,38 @@
 
 set -e
 
-FLAGS="--std=08 -fsynopsys -fexplicit -frelaxed"
+DIR=../resources/vhdl
 
-ghdl -a $FLAGS --work=blink_lib ../resources/vhdl/blink.vhdl
-ghdl -a $FLAGS --work=blink_lib ../resources/vhdl/blink_pkg.vhdl
-ghdl -a $FLAGS ../resources/vhdl/top.vhdl
+FLAGS="--std=08 -fsynopsys -fexplicit -frelaxed"
 
 GENERICS="-gBOO=true -gINT=255 -gLOG='1' -gVEC="11111111" -gCHR='Z' -gSTR="WXYZ" -gSKIP_REA=1"
-ghdl --synth $FLAGS $GENERICS Top ARCH_SEL
+
+###############################################################################
+# Alternative 1
+###############################################################################
+
+# This alternative is better to specify particular options per file
+
+ghdl -a $FLAGS --work=blink_lib $DIR/blink.vhdl
+ghdl -a $FLAGS --work=blink_lib $DIR/blink_pkg.vhdl
+ghdl -a $FLAGS $DIR/top.vhdl
+
+# --out=raw-vhdl generate a VHDL 93 netlist
+
+ghdl synth $FLAGS --out=raw-vhdl $GENERICS Top ARCH_SEL
+
+# This alternative creates .cf files due the ghdl -a
+rm -fr *.cf
+
+###############################################################################
+# Alternative 2
+###############################################################################
+
+# This alternative is more concise
+
+# --work=<LIBNAME> applies to the following files
+# --out=verilog generate a Verilog netlist
+
+ghdl synth $FLAGS --out=verilog $GENERICS \
+  --work=blink_lib $DIR/blink.vhdl $DIR/blink_pkg.vhdl \
+  --work=work $DIR/top.vhdl -e Top ARCH_SEL