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disable_reset option of RingBuffer is removed. As the default behavior in the current implementation, it does not reset the address counter.
1 parent 9412edf commit 3e862aa

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4 files changed

+6
-10
lines changed

4 files changed

+6
-10
lines changed
Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,16 +3,16 @@
33

44
import os
55
import veriloggen
6-
import thread_stream_ringbuffer_disable_reset
6+
import thread_stream_ringbuffer_reuse
77

88

99
def test(request):
1010
veriloggen.reset()
1111

1212
simtype = request.config.getoption('--sim')
1313

14-
rslt = thread_stream_ringbuffer_disable_reset.run(filename=None, simtype=simtype,
15-
outputfile=os.path.splitext(os.path.basename(__file__))[0] + '.out')
14+
rslt = thread_stream_ringbuffer_reuse.run(filename=None, simtype=simtype,
15+
outputfile=os.path.splitext(os.path.basename(__file__))[0] + '.out')
1616

1717
verify_rslt = rslt.splitlines()[-1]
1818
assert(verify_rslt == '# verify: PASSED')
Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ def mkLed():
3131

3232
a = strm.source('a')
3333

34-
buf = strm.RingBuffer(a, length=128, disable_reset=True)
34+
buf = strm.RingBuffer(a, length=128)
3535
a_old = buf.read(-img_width)
3636

3737
b = a + a_old

veriloggen/stream/stypes.py

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2856,7 +2856,7 @@ class RingBuffer(_UnaryOperator):
28562856
latency = 1
28572857

28582858
def __init__(self, var, length,
2859-
enable=None, reset=None, disable_reset=False):
2859+
enable=None, reset=None):
28602860

28612861
self.enable = _to_constant(enable)
28622862
if self.enable is not None:
@@ -2869,7 +2869,6 @@ def __init__(self, var, length,
28692869
self.length = length
28702870

28712871
_UnaryOperator.__init__(self, var)
2872-
self.disable_reset = disable_reset
28732872

28742873
self.num_ports = 1
28752874
self.read_vars = []
@@ -2919,10 +2918,7 @@ def _implement(self, m, seq, svalid=None, senable=None):
29192918
reset_waddr = 0
29202919
reset_cond = _and_vars(svalid, senable, enabledata, resetdata)
29212920

2922-
if self.disable_reset:
2923-
seq(waddr(waddr), cond=reset_cond)
2924-
else:
2925-
seq(waddr(reset_waddr), cond=reset_cond)
2921+
seq(waddr(waddr), cond=reset_cond)
29262922

29272923
resetdata_x = vtypes.Not(resetdata) if resetdata is not None else 1
29282924
wenable = _and_vars(svalid, senable, enabledata, resetdata_x)

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