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Required Pyverilog version is 1.0.3
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README.md

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@@ -47,7 +47,7 @@ Install on your python environment by using pip:
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pip install jinja2
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- Pyverilog: 1.0.2 or later
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- Pyverilog: 1.0.3 or later
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Install from pip (or download and install from GitHub):
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@@ -203,7 +203,7 @@ module test #
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reg CLK;
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reg RST;
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wire [WIDTH - 1:0] LED;
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wire [WIDTH-1:0] LED;
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blinkled
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#(
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(
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input CLK,
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input RST,
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output reg [WIDTH - 1:0] LED
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output reg [WIDTH-1:0] LED
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);
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reg [32 - 1:0] count;
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reg [32-1:0] count;
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always @(posedge CLK) begin
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if(RST) begin

README.rst

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@@ -53,7 +53,7 @@ Install on your python environment by using pip:
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pip install jinja2
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- Pyverilog: 1.0.2 or later
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- Pyverilog: 1.0.3 or later
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Install from pip (or download and install from GitHub):
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@@ -222,7 +222,7 @@ which is generated by the source code generator.
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reg CLK;
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reg RST;
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wire [WIDTH - 1:0] LED;
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wire [WIDTH-1:0] LED;
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blinkled
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#(
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(
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input CLK,
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input RST,
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output reg [WIDTH - 1:0] LED
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output reg [WIDTH-1:0] LED
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);
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reg [32 - 1:0] count;
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reg [32-1:0] count;
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always @(posedge CLK) begin
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if(RST) begin

setup.py

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@@ -21,7 +21,7 @@ def read(filename):
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url='https://github.com/PyHDI/veriloggen',
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packages=find_packages(),
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#package_data={ 'path' : ['*.*'], },
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install_requires=[ 'pyverilog>=1.0.2', 'Jinja2>=2.8' ],
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install_requires=[ 'pyverilog>=1.0.3', 'Jinja2>=2.8' ],
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extras_require={
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'graph' : [ 'pygraphviz>=1.3.1' ],
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'test' : [ 'pytest>=2.8.2', 'pytest-pythonpath>=0.7' ],

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