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shtaxxxshtaxxx
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pipeline.py is updated
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3 files changed

+94
-37
lines changed

3 files changed

+94
-37
lines changed

‎sample/tests/lib_pipeline/average_valid/test_led.py‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -212,15 +212,15 @@
212212
reg [32-1:0] _pipe_data_0;
213213
reg _pipe_valid_0;
214214
wire _pipe_nvalid_0;
215-
assign _pipe_nvalid_0 = (_pipe_valid_0 && vx);
215+
assign _pipe_nvalid_0 = (vx && _pipe_valid_0);
216216
reg [32-1:0] _pipe_data_1;
217217
reg _pipe_valid_1;
218218
wire _pipe_nvalid_1;
219-
assign _pipe_nvalid_1 = (_pipe_valid_1 && vx);
219+
assign _pipe_nvalid_1 = (vx && _pipe_valid_1);
220220
reg [32-1:0] _pipe_data_2;
221221
reg _pipe_valid_2;
222222
wire _pipe_nvalid_2;
223-
assign _pipe_nvalid_2 = (_pipe_valid_2 && vx);
223+
assign _pipe_nvalid_2 = (vx && _pipe_valid_2);
224224
reg [32-1:0] _pipe_data_3;
225225
reg _pipe_valid_3;
226226
reg [32-1:0] _pipe_data_4;
@@ -263,18 +263,18 @@
263263
if(_pipe_nvalid_1) begin
264264
_pipe_valid_2 <= _pipe_nvalid_1;
265265
end
266-
if(_pipe_nvalid_1 & _pipe_nvalid_2) begin
266+
if(_pipe_nvalid_1 && _pipe_nvalid_2) begin
267267
_pipe_data_3 <= _pipe_data_1 + _pipe_data_2;
268268
end
269-
_pipe_valid_3 <= _pipe_nvalid_1 & _pipe_nvalid_2;
269+
_pipe_valid_3 <= _pipe_nvalid_1 && _pipe_nvalid_2;
270270
if(_pipe_nvalid_0) begin
271271
_pipe_data_4 <= _pipe_data_0;
272272
end
273273
_pipe_valid_4 <= _pipe_nvalid_0;
274-
if(_pipe_valid_3 & _pipe_valid_4) begin
274+
if(_pipe_valid_3 && _pipe_valid_4) begin
275275
_pipe_data_5 <= _pipe_data_3 + _pipe_data_4;
276276
end
277-
_pipe_valid_5 <= _pipe_valid_3 & _pipe_valid_4;
277+
_pipe_valid_5 <= _pipe_valid_3 && _pipe_valid_4;
278278
y <= _pipe_data_5;
279279
vy <= _pipe_valid_5;
280280
end

‎sample/tests/lib_pipeline/average_validready/test_led.py‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -163,13 +163,13 @@
163163
reg _pipe_valid_0;
164164
wire _pipe_ready_0;
165165
wire _pipe_nvalid_0;
166-
assign _pipe_nvalid_0 = ((_pipe_valid_0 && vx) && _pipe_ready_0);
166+
assign _pipe_nvalid_0 = ((vx && _pipe_valid_0) && _pipe_ready_0);
167167
assign rx = _pipe_ready_0;
168168
reg [32-1:0] _pipe_data_1;
169169
reg _pipe_valid_1;
170170
wire _pipe_ready_1;
171171
wire _pipe_nvalid_1;
172-
assign _pipe_nvalid_1 = ((_pipe_valid_1 && vx) && _pipe_ready_1);
172+
assign _pipe_nvalid_1 = ((vx && _pipe_valid_1) && _pipe_ready_1);
173173
assign _pipe_ready_0 = _pipe_ready_1;
174174
reg [32-1:0] _pipe_data_2;
175175
reg _pipe_valid_2;
@@ -214,23 +214,23 @@
214214
if((_pipe_nvalid_0 && _pipe_ready_1)) begin
215215
_pipe_valid_1 <= _pipe_nvalid_0;
216216
end
217-
if(((_pipe_nvalid_0 & _pipe_nvalid_1) && _pipe_ready_2)) begin
217+
if(((_pipe_nvalid_0 && _pipe_nvalid_1) && _pipe_ready_2)) begin
218218
_pipe_data_2 <= (_pipe_data_0 + _pipe_data_1);
219219
end
220220
if(_pipe_ready_2) begin
221-
_pipe_valid_2 <= (_pipe_nvalid_0 & _pipe_nvalid_1);
221+
_pipe_valid_2 <= (_pipe_nvalid_0 && _pipe_nvalid_1);
222222
end
223223
if((vx && _pipe_ready_3)) begin
224224
_pipe_data_3 <= x;
225225
end
226226
if(_pipe_ready_3) begin
227227
_pipe_valid_3 <= vx;
228228
end
229-
if(((_pipe_valid_2 & _pipe_valid_3) && _pipe_ready_4)) begin
229+
if(((_pipe_valid_2 && _pipe_valid_3) && _pipe_ready_4)) begin
230230
_pipe_data_4 <= (_pipe_data_2 + _pipe_data_3);
231231
end
232232
if(_pipe_ready_4) begin
233-
_pipe_valid_4 <= (_pipe_valid_2 & _pipe_valid_3);
233+
_pipe_valid_4 <= (_pipe_valid_2 && _pipe_valid_3);
234234
end
235235
y <= _pipe_data_4;
236236
vy <= _pipe_valid_4;

‎veriloggen/lib/pipeline.py‎

Lines changed: 81 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -66,17 +66,39 @@ def make_tmp(self, data, valid, ready, width=None, initval=0):
6666

6767
self.tmp_count += 1
6868

69-
if valid is not None and ready:
70-
self.par.add( tmp_data(data), cond=vtypes.AndList(valid, tmp_ready) )
71-
elif valid is None and ready:
72-
self.par.add( tmp_data(data), cond=tmp_ready )
73-
else:
74-
self.par.add( tmp_data(data), cond=valid )
75-
69+
# data
70+
data_valid_vars = []
7671
if valid is not None:
77-
self.par.add( tmp_valid(valid), cond=tmp_ready )
72+
data_valid_vars.append(valid)
73+
if tmp_ready is not None:
74+
data_valid_vars.append(tmp_ready)
75+
76+
if len(data_valid_vars) == 0:
77+
data_cond = None
78+
elif len(data_valid_vars) == 1:
79+
data_cond = data_valid_vars[0]
80+
else:
81+
data_cond = vtypes.AndList(*data_valid_vars)
82+
83+
self.par.add( tmp_data(data), cond=data_cond )
7884

79-
if ready:
85+
# valid
86+
valid_valid_vars = []
87+
if tmp_ready is not None:
88+
valid_valid_vars.append( tmp_ready )
89+
90+
if len(valid_valid_vars) == 0:
91+
valid_cond = None
92+
elif len(valid_valid_vars) == 1:
93+
valid_cond = valid_valid_vars[0]
94+
else:
95+
valid_cond = vtypes.AndList(*valid_valid_vars)
96+
97+
if tmp_valid is not None:
98+
self.par.add( tmp_valid(valid), cond=tmp_ready )
99+
100+
# ready
101+
if tmp_ready is not None:
80102
for r in ready:
81103
if r: self.m.Assign( r(tmp_ready) )
82104

@@ -102,27 +124,62 @@ def make_prev(self, data, valid, ready, root_valid=None, width=None, initval=0):
102124
next_valid = None
103125

104126
self.tmp_count += 1
127+
128+
# data
129+
data_valid_vars = []
130+
if valid is not None:
131+
data_valid_vars.append(valid)
132+
if tmp_ready is not None:
133+
data_valid_vars.append(tmp_ready)
134+
135+
if len(data_valid_vars) == 0:
136+
data_cond = None
137+
elif len(data_valid_vars) == 1:
138+
data_cond = data_valid_vars[0]
139+
else:
140+
data_cond = vtypes.AndList(*data_valid_vars)
105141

106-
if valid is not None and ready is not None:
107-
self.par.add( tmp_data(data), cond=vtypes.AndList(valid, tmp_ready) )
108-
elif valid is None and ready is not Noone:
109-
self.par.add( tmp_data(data), cond=tmp_ready )
142+
self.par.add( tmp_data(data), cond=data_cond )
143+
144+
# valid
145+
valid_valid_vars = []
146+
if valid is not None:
147+
valid_valid_vars.append(valid)
148+
if tmp_ready is not None:
149+
valid_valid_vars.append(tmp_ready)
150+
151+
if len(valid_valid_vars) == 0:
152+
valid_cond = None
153+
elif len(valid_valid_vars) == 1:
154+
valid_cond = valid_valid_vars[0]
110155
else:
111-
self.par.add( tmp_data(data), cond=valid )
156+
valid_cond = vtypes.AndList(*valid_valid_vars)
157+
158+
if tmp_valid is not None:
159+
self.par.add( tmp_valid(valid), cond=valid_cond )
160+
161+
next_valid_valid_vars = []
162+
if root_valid is not None:
163+
next_valid_valid_vars.append(root_valid)
164+
if tmp_valid is not None:
165+
next_valid_valid_vars.append(tmp_valid)
166+
if tmp_ready is not None:
167+
next_valid_valid_vars.append(tmp_ready)
112168

113-
if valid is not None and ready is not None:
114-
self.par.add( tmp_valid(valid), cond=vtypes.AndList(valid, tmp_ready) )
115-
self.m.Assign( next_valid(vtypes.AndList(tmp_valid, root_valid, tmp_ready)) )
116-
elif valid is None and ready is not None:
117-
self.par.add( tmp_valid(valid), cond=tmp_ready )
118-
self.m.Assign( next_valid(tmp_ready) )
169+
if len(next_valid_valid_vars) == 0:
170+
next_valid_cond = None
171+
elif len(next_valid_valid_vars) == 1:
172+
next_valid_cond = next_valid_valid_vars[0]
119173
else:
120-
self.par.add( tmp_valid(valid), cond=valid )
121-
self.m.Assign( next_valid(vtypes.AndList(tmp_valid, root_valid)) )
174+
next_valid_cond = vtypes.AndList(*next_valid_valid_vars)
175+
176+
if next_valid is not None:
177+
self.m.Assign( next_valid(next_valid_cond) )
122178

179+
# ready
123180
if ready is not None:
124181
self.m.Assign( ready(tmp_ready) )
125-
182+
126183
return tmp_data, next_valid, tmp_ready
127184

128185
#---------------------------------------------------------------------------
@@ -260,7 +317,7 @@ def __init__(self, pipe):
260317

261318
def make_valid(self, lvalid, rvalid):
262319
if rvalid is not None and lvalid is not None:
263-
return vtypes.And(lvalid, rvalid)
320+
return vtypes.AndList(lvalid, rvalid)
264321
elif rvalid is None and lvalid is None:
265322
return None
266323
elif rvalid is None:

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