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_MutexFunction
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‎veriloggen/thread/ttypes.py‎

Lines changed: 52 additions & 173 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,31 @@ def Lock(m, name, clk, rst, width=32):
2020
return Mutex(m, name, clk, rst, width)
2121

2222

23+
class _MutexFunction(object):
24+
__intrinsics__ = ('lock', 'try_lock', 'unlock')
25+
26+
def lock(self, fsm):
27+
if self.mutex is None:
28+
self.mutex = Mutex(self.m, '_'.join(
29+
['', self.name, 'mutex']), self.clk, self.rst)
30+
31+
return self.mutex.lock(fsm)
32+
33+
def try_lock(self, fsm):
34+
if self.mutex is None:
35+
self.mutex = Mutex(self.m, '_'.join(
36+
['', self.name, 'mutex']), self.clk, self.rst)
37+
38+
return self.mutex.try_lock(fsm)
39+
40+
def unlock(self, fsm):
41+
if self.mutex is None:
42+
self.mutex = Mutex(self.m, '_'.join(
43+
['', self.name, 'mutex']), self.clk, self.rst)
44+
45+
return self.mutex.unlock(fsm)
46+
47+
2348
class Mutex(object):
2449
__intrinsics__ = ('lock', 'try_lock', 'unlock',
2550
'acquire', 'release')
@@ -188,12 +213,15 @@ def wait(self, fsm):
188213
return 0
189214

190215

191-
class Shared(object):
192-
__intrinsics__ = ('read', 'write',
193-
'lock', 'try_lock', 'unlock')
216+
class Shared(_MutexFunction):
217+
__intrinsics__ = ('read', 'write') + _MutexFunction.__intrinsics__
194218

195-
def __init__(self, value):
219+
def __init__(self, value, m=None, clk=None, rst=None):
196220
self._value = value
221+
self.m = m
222+
self.clk = clk
223+
self.rst = rst
224+
self.name = self._value.name
197225
self.seq = None
198226
self.mutex = None
199227

@@ -206,8 +234,9 @@ def read(self, fsm):
206234

207235
def write(self, fsm, value, *part):
208236
if self.seq is None:
209-
self.seq = Seq(fsm.m, '_'.join(
210-
['seq', self._value.name]), fsm.clk, fsm.rst)
237+
clk = fsm.clk if self.clk is None else self.clk
238+
rst = fsm.rst if self.rst is None else self.rst
239+
self.seq = Seq(fsm.m, '_'.join(['seq', self.name]), clk, rst)
211240

212241
cond = fsm.state == fsm.current
213242

@@ -232,31 +261,10 @@ def getval(v, p):
232261
fsm.goto_next()
233262
return 0
234263

235-
def lock(self, fsm):
236-
if self.mutex is None:
237-
self.mutex = Mutex(self.m, '_'.join(
238-
['', self.name, 'mutex']), self.clk, self.rst)
239-
240-
return self.mutex.lock(fsm)
241-
242-
def try_lock(self, fsm):
243-
if self.mutex is None:
244-
self.mutex = Mutex(self.m, '_'.join(
245-
['', self.name, 'mutex']), self.clk, self.rst)
246-
247-
return self.mutex.try_lock(fsm)
248-
249-
def unlock(self, fsm):
250-
if self.mutex is None:
251-
self.mutex = Mutex(self.m, '_'.join(
252-
['', self.name, 'mutex']), self.clk, self.rst)
253-
254-
return self.mutex.unlock(fsm)
255-
256264

257-
class RAM(ram.SyncRAMManager):
258-
__intrinsics__ = ('read', 'write', 'dma_read', 'dma_write',
259-
'lock', 'try_lock', 'unlock')
265+
class RAM(ram.SyncRAMManager, _MutexFunction):
266+
__intrinsics__ = ('read', 'write', 'dma_read',
267+
'dma_write') + _MutexFunction.__intrinsics__
260268

261269
def __init__(self, m, name, clk, rst,
262270
datawidth=32, addrwidth=10, numports=1):
@@ -356,33 +364,11 @@ def dma_write(self, fsm, bus, local_addr, global_addr, size, port=0):
356364

357365
return bus.dma_write(fsm, self, local_addr, global_addr, size, port)
358366

359-
def lock(self, fsm):
360-
if self.mutex is None:
361-
self.mutex = Mutex(self.m, '_'.join(
362-
['', self.name, 'mutex']), self.clk, self.rst)
363-
364-
return self.mutex.lock(fsm)
365-
366-
def try_lock(self, fsm):
367-
if self.mutex is None:
368-
self.mutex = Mutex(self.m, '_'.join(
369-
['', self.name, 'mutex']), self.clk, self.rst)
370-
371-
return self.mutex.try_lock(fsm)
372-
373-
def unlock(self, fsm):
374-
if self.mutex is None:
375-
self.mutex = Mutex(self.m, '_'.join(
376-
['', self.name, 'mutex']), self.clk, self.rst)
377-
378-
return self.mutex.unlock(fsm)
379-
380367

381-
class FIFO(fifo.Fifo):
368+
class FIFO(fifo.Fifo, _MutexFunction):
382369
__intrinsics__ = ('enq', 'deq', 'try_enq', 'try_deq',
383370
'is_empty', 'is_almost_empty',
384-
'is_full', 'is_almost_full',
385-
'lock', 'try_lock', 'unlock')
371+
'is_full', 'is_almost_full') + _MutexFunction.__intrinsics__
386372

387373
def __init__(self, m, name, clk, rst, datawidth=32, addrwidth=4):
388374
fifo.Fifo.__init__(self, m, name, clk, rst, datawidth, addrwidth)
@@ -460,31 +446,10 @@ def is_full(self, fsm):
460446
fsm.goto_next()
461447
return self.full
462448

463-
def lock(self, fsm):
464-
if self.mutex is None:
465-
self.mutex = Mutex(self.m, '_'.join(
466-
['', self.name, 'mutex']), self.clk, self.rst)
467-
468-
return self.mutex.lock(fsm)
469-
470-
def try_lock(self, fsm):
471-
if self.mutex is None:
472-
self.mutex = Mutex(self.m, '_'.join(
473-
['', self.name, 'mutex']), self.clk, self.rst)
474-
475-
return self.mutex.try_lock(fsm)
476449

477-
def unlock(self, fsm):
478-
if self.mutex is None:
479-
self.mutex = Mutex(self.m, '_'.join(
480-
['', self.name, 'mutex']), self.clk, self.rst)
481-
482-
return self.mutex.unlock(fsm)
483-
484-
485-
class AXIM(axi.AxiMaster):
486-
__intrinsics__ = ('read', 'write', 'dma_read', 'dma_write',
487-
'lock', 'try_lock', 'unlock')
450+
class AXIM(axi.AxiMaster, _MutexFunction):
451+
__intrinsics__ = ('read', 'write', 'dma_read',
452+
'dma_write') + _MutexFunction.__intrinsics__
488453

489454
burstlen = 256
490455

@@ -618,62 +583,20 @@ def dma_write(self, fsm, ram, local_addr, global_addr, size, port=0):
618583

619584
return 0
620585

621-
def lock(self, fsm):
622-
if self.mutex is None:
623-
self.mutex = Mutex(self.m, '_'.join(
624-
['', self.name, 'mutex']), self.clk, self.rst)
625-
626-
return self.mutex.lock(fsm)
627-
628-
def try_lock(self, fsm):
629-
if self.mutex is None:
630-
self.mutex = Mutex(self.m, '_'.join(
631-
['', self.name, 'mutex']), self.clk, self.rst)
632-
633-
return self.mutex.try_lock(fsm)
634-
635-
def unlock(self, fsm):
636-
if self.mutex is None:
637-
self.mutex = Mutex(self.m, '_'.join(
638-
['', self.name, 'mutex']), self.clk, self.rst)
639-
640-
return self.mutex.unlock(fsm)
641-
642586

643-
class AXIS(axi.AxiSlave):
644-
__intrinsics__ = ('lock', 'try_lock', 'unlock')
587+
class AXIS(axi.AxiSlave, _MutexFunction):
588+
__intrinsics__ = _MutexFunction.__intrinsics__
645589

646590
def __init__(self, m, name, clk, rst, datawidth=32, addrwidth=32,
647591
lite=False, noio=False):
648592
axi.AxiSlave.__init__(self, m, name, clk, rst, datawidth, addrwidth,
649593
lite=lite, noio=noio)
650594
self.mutex = None
651595

652-
def lock(self, fsm):
653-
if self.mutex is None:
654-
self.mutex = Mutex(self.m, '_'.join(
655-
['', self.name, 'mutex']), self.clk, self.rst)
656-
657-
return self.mutex.lock(fsm)
658-
659-
def try_lock(self, fsm):
660-
if self.mutex is None:
661-
self.mutex = Mutex(self.m, '_'.join(
662-
['', self.name, 'mutex']), self.clk, self.rst)
663-
664-
return self.mutex.try_lock(fsm)
665-
666-
def unlock(self, fsm):
667-
if self.mutex is None:
668-
self.mutex = Mutex(self.m, '_'.join(
669-
['', self.name, 'mutex']), self.clk, self.rst)
670-
671-
return self.mutex.unlock(fsm)
672596

673-
674-
class AXISRegister(AXIS):
675-
__intrinsics__ = ('read', 'write', 'write_flag', 'wait', 'wait_flag',
676-
'lock', 'try_lock', 'unlock')
597+
class AXISRegister(AXIS, _MutexFunction):
598+
__intrinsics__ = ('read', 'write', 'write_flag', 'wait',
599+
'wait_flag') + _MutexFunction.__intrinsics__
677600

678601
def __init__(self, m, name, clk, rst, datawidth=32, addrwidth=32,
679602
lite=False, noio=False, length=4):
@@ -931,9 +854,8 @@ def AXISLiteRegister(m, name, clk, rst, datawidth=32, addrwidth=32,
931854
lite=True, noio=noio, length=length)
932855

933856

934-
class UartTx(uart.UartTx):
935-
__intrinsics__ = ('send',
936-
'lock', 'try_lock', 'unlock')
857+
class UartTx(uart.UartTx, _MutexFunction):
858+
__intrinsics__ = ('send',) + _MutexFunction.__intrinsics__
937859

938860
def __init__(self, m, name, prefix, clk, rst, txd=None,
939861
arg_params=None, arg_ports=None,
@@ -947,31 +869,9 @@ def __init__(self, m, name, prefix, clk, rst, txd=None,
947869

948870
self.mutex = None
949871

950-
def lock(self, fsm):
951-
if self.mutex is None:
952-
self.mutex = Mutex(self.m, '_'.join(
953-
['', self.name, 'mutex']), self.clk, self.rst)
954-
955-
return self.mutex.lock(fsm)
956-
957-
def try_lock(self, fsm):
958-
if self.mutex is None:
959-
self.mutex = Mutex(self.m, '_'.join(
960-
['', self.name, 'mutex']), self.clk, self.rst)
961-
962-
return self.mutex.try_lock(fsm)
963-
964-
def unlock(self, fsm):
965-
if self.mutex is None:
966-
self.mutex = Mutex(self.m, '_'.join(
967-
['', self.name, 'mutex']), self.clk, self.rst)
968-
969-
return self.mutex.unlock(fsm)
970-
971872

972-
class UartRx(uart.UartRx):
973-
__intrinsics__ = ('recv',
974-
'lock', 'try_lock', 'unlock')
873+
class UartRx(uart.UartRx, _MutexFunction):
874+
__intrinsics__ = ('recv',) + _MutexFunction.__intrinsics__
975875

976876
def __init__(self, m, name, prefix, clk, rst, rxd=None,
977877
arg_params=None, arg_ports=None,
@@ -984,24 +884,3 @@ def __init__(self, m, name, prefix, clk, rst, rxd=None,
984884
baudrate=baudrate, clockfreq=clockfreq)
985885

986886
self.mutex = None
987-
988-
def lock(self, fsm):
989-
if self.mutex is None:
990-
self.mutex = Mutex(self.m, '_'.join(
991-
['', self.name, 'mutex']), self.clk, self.rst)
992-
993-
return self.mutex.lock(fsm)
994-
995-
def try_lock(self, fsm):
996-
if self.mutex is None:
997-
self.mutex = Mutex(self.m, '_'.join(
998-
['', self.name, 'mutex']), self.clk, self.rst)
999-
1000-
return self.mutex.try_lock(fsm)
1001-
1002-
def unlock(self, fsm):
1003-
if self.mutex is None:
1004-
self.mutex = Mutex(self.m, '_'.join(
1005-
['', self.name, 'mutex']), self.clk, self.rst)
1006-
1007-
return self.mutex.unlock(fsm)

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