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Z80.py
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5974 lines (4104 loc) · 92.4 KB
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import struct
import video
import memory
import ports
show_debug_info = False
tstatesPerInterrupt = 0
def Z80(clockFrequencyInMHz):
global tstatesPerInterrupt
# 50Hz for main interrupt signal
tstatesPerInterrupt = int((clockFrequencyInMHz * 1e6) / 50)
IM0 = 0
IM1 = 1
IM2 = 2
F_C = 0x01
F_N = 0x02
F_PV = 0x04
F_3 = 0x08
F_H = 0x10
F_5 = 0x20
F_Z = 0x40
F_S = 0x80
F_3_16 = F_3 << 8
F_5_16 = F_5 << 8
PF = F_PV
p_ = 0
parity = [False] * 256
for i in range(256):
p = True
int_type = i
while (int_type):
p = not p_
int_type = int_type & (int_type - 1)
parity[i] = p
# **Main registers
_AF_b = bytearray(2)
_A_F = memoryview(_AF_b)
_F = _A_F[0:1]
_A = _A_F[1:2]
_AF = _A_F.cast('H')
_fS = False
_fZ = False
_f5 = False
_fH = False
_f3 = False
_fPV = False
_fN = False
_fC = False
def setflags():
global _f3, _f5, _fC, _fH, _fN, _fPV, _fS, _fZ
_fS = (_F[0] & F_S) != 0
_fZ = (_F[0] & F_Z) != 0
_f5 = (_F[0] & F_5) != 0
_fH = (_F[0] & F_H) != 0
_f3 = (_F[0] & F_3) != 0
_fPV = (_F[0] & F_PV) != 0
_fN = (_F[0] & F_N) != 0
_fC = (_F[0] & F_C) != 0
_HL_b = bytearray(2)
_H_L = memoryview(_HL_b)
_L = _H_L[0:1]
_H = _H_L[1:2]
_HL = _H_L.cast('H')
_BC_b = bytearray(2)
_B_C = memoryview(_BC_b)
_C = _B_C[0:1]
_B = _B_C[1:2]
_BC = _B_C.cast('H')
_DE_b = bytearray(2)
_D_E = memoryview(_DE_b)
_E = _D_E[0:1]
_D = _D_E[1:2]
_DE = _D_E.cast('H')
# ** Alternate registers
_AF_b_ = bytearray(2)
_A_F_ = memoryview(_AF_b_)
_F_ = _A_F_[0:1]
_A_ = _A_F_[1:2]
_AF_ = _A_F_.cast('H')
_HL_b_ = bytearray(2)
_H_L_ = memoryview(_HL_b_)
_L_ = _H_L_[0:1]
_H_ = _H_L_[1:2]
_HL_ = _H_L_.cast('H')
_BC_b_ = bytearray(2)
_B_C_ = memoryview(_BC_b_)
_C_ = _B_C_[0:1]
_B_ = _B_C_[1:2]
_BC_ = _B_C_.cast('H')
_DE_b_ = bytearray(2)
_D_E_ = memoryview(_DE_b_)
_E_ = _D_E_[0:1]
_D_ = _D_E_[1:2]
_DE_ = _D_E_.cast('H')
# ** Index registers - ID used as temporary for ix/iy
_IX_b = bytearray(2)
_IXH_IXL = memoryview(_IX_b)
_IXL = _IXH_IXL[0:1]
_IXH = _IXH_IXL[1:2]
_IX = _IXH_IXL.cast('H')
_IY_b = bytearray(2)
_IYH_IYL = memoryview(_IY_b)
_IYL = _IYH_IYL[0:1]
_IYH = _IYH_IYL[1:2]
_IY = _IYH_IYL.cast('H')
_IDH = None
_IDL = None
_ID = None
# ** Stack Pointer and Program Counter
_SP_b = bytearray(2)
_SP = memoryview(_SP_b).cast('H')
_PC_b = bytearray(2)
_PC = memoryview(_PC_b).cast('H')
# ** Interrupt and Refresh registers
_I_b = bytearray(2)
_IH_IL = memoryview(_I_b)
_I = _IH_IL[1:2]
#_Ifull = _IH_IL.cast('H')
# Memory refresh register
_R_b = _IH_IL[0:1]
_R7_b = 0
def _Rget():
global _R7_b
return _R_b[0]
def _Rset(r):
global _R7_b
_R_b[0] = r
_R7_b = 0x80 if r > 0x7F else 0
_R = property(_Rget, _Rset)
def inc_r(r = 1):
global _R7_b
_R_b[0] = ((_R_b[0] + r) % 128) + _R7_b
# ** Interrupt flip-flops
_IFF1 = True
_IFF2 = True
_IM = IM2
# Stack access
def pushw(word):
global _SP
_SP[0] = (_SP[0] - 2) % 65536
memory.pokew(_SP[0], word)
def popw():
t = memory.peekw(_SP[0])
_SP[0] = (_SP[0] + 2) % 65536
return t
# Call stack
def pushpc():
pushw(_PC[0])
def poppc():
_PC[0] = popw()
def nxtpcb():
t = memory.peekb(_PC[0])
_PC[0] = (_PC[0] + 1) % 65536
return t
def nxtpcsb():
global show_debug_info
t = memory.peeksb(_PC[0])
_PC[0] = (_PC[0] + 1) % 65536
if show_debug_info:
print(f'signedbyte: {t}, PC: 0x{_PC[0]:4x}')
return t
def incpcsb():
t = nxtpcsb()
_PC[0] = (_PC[0] + t) % 65536
def nxtpcw():
t = memory.peekw(_PC[0])
_PC[0] = (_PC[0] + 2) % 65536
return t
# Reset all registers to power on state
def reset():
global _R, _IFF1, _IFF2
global _fS, _fZ, _f5, _fH, _f3, _fPV, _fN, _fC
_PC[0] = 0
_SP[0] = 0
_fS = False
_fZ = False
_f5 = False
_fH = False
_f3 = False
_fPV = False
_fN = False
_fC = False
_AF[0] = 0
_BC[0] = 0
_DE[0] = 0
_HL[0] = 0
_AF_[0] = 0
_BC_[0] = 0
_DE_[0] = 0
_HL_[0] = 0
_IX[0] = 0
_IY[0] = 0
_R = 0
#_Ifull[0] = 0
_IFF1 = 0
_IFF2 = 0
_IM = IM0
def show_registers():
global show_debug_info
if show_debug_info:
print(f'PC: 0x{_PC[0]:04x}\tOPCODE: {memory.peekb(_PC[0]):03d}\tA: 0x{_A[0]:02x}\tHL: 0x{_HL[0]:04x}\tBC: 0x{_BC[0]:04x}\tDE: 0x{_DE[0]:04x}')
print(f'FLAGS 0x{_F[0]:02x}\tC: {_fC}\tN: {_fN}\tPV: {_fPV}\t3: {_f3}\tH: {_fH}\t5: {_f5}\tZ: {_fZ}\tS: {_fS}')
print(f'IFF1 {_IFF1}, IFF2 {_IFF2}')
# Interrupt handlers
# def interruptTriggered( tstates ):
# return (tstates >= 0);
video_update_time = 0
def interrupt():
global video_update_time
Hz = 25
video_update_time += 1
ports.keyboard.do_keys()
if not (video_update_time % int(50 / Hz)):
video.update()
return interruptCPU()
def interruptCPU():
global _IM, _IFF1, show_debug_info
# If not a non-maskable interrupt
def im0im1():
global _IFF1, _IFF2
pushpc()
_IFF1 = False
_IFF2 = False
_PC[0] = 56
return 13
def im2():
global _IFF1, _IFF2
pushpc()
_IFF1 = False
_IFF2 = False
#_PC[0] = memory.peekw(_Ifull[0])
_PC[0] = memory.peekw(_I[0]*256+255)
return 19
if not _IFF1:
#if show_debug_info:
# print('NO interrupt')
return 0
if show_debug_info:
print(f'Interrupt: {_IM}, PC: 0x{_PC[0]:4x}, IFF1: {_IFF1}')
return {IM0: im0im1, IM1: im0im1, IM2: im2}.get(_IM)()
# Z80 fetch/execute loop
local_tstates = -tstatesPerInterrupt # -70000
def check_tstates():
global local_tstates
if local_tstates >= 0:
#print(f'LTS: {local_tstates} _PC: {_PC[0]:4x}')
local_tstates -= tstatesPerInterrupt - interrupt()
def execute():
global _R, main_cmds, local_tstates
while True:
check_tstates()
inc_r()
show_registers()
opcode = nxtpcb()
if opcode == 118: # HALT
haltsToInterrupt = int(((-local_tstates - 1) / 4) + 1)
local_tstates += (haltsToInterrupt * 4)
inc_r(haltsToInterrupt - 1)
continue
else:
local_tstates += main_cmds.get(opcode)()
def execute_id():
global _ixiydict
inc_r()
opcode = nxtpcb()
return _ixiydict.get(opcode, nop)()
def execute_id_cb(opcode, z):
global _idcbdict
return _idcbdict.get(opcode)(z)
def nop():
return 4
# EXX
def exx():
global _HL, _HL_, _H, _H_, _L, _L_
global _DE, _DE_, _D, _D_, _E, _E_
global _BC, _BC_, _B, _B_, _C, _C_
_HL, _HL_ = _HL_, _HL
_H, _H_ = _H_, _H
_L, _L_ = _L_, _L
_DE, _DE_ = _DE_, _DE
_D, _D_ = _D_, _D
_E, _E_ = _E_, _E
_BC, _BC_ = _BC_, _BC
_B, _B_ = _B_, _B
_C, _C_ = _C_, _C
return 4
# EX AF,AF'
def ex_af_af():
global _AF, _AF_, _A, _A_, _F, _F_
_F[0] = (F_S if _fS else 0) + \
(F_Z if _fZ else 0) + \
(F_5 if _f5 else 0) + \
(F_H if _fH else 0) + \
(F_3 if _f3 else 0) + \
(F_PV if _fPV else 0) + \
(F_N if _fN else 0) + \
(F_C if _fC else 0)
_AF, _AF_ = _AF_, _AF
_A, _A_ = _A_, _A
_F, _F_ = _F_, _F
setflags()
return 4
def djnz():
_B[0] = qdec8(_B[0])
if _B[0] != 0:
incpcsb()
return 13
else:
_PC[0] = inc16(_PC[0])
return 8
def jr():
incpcsb()
return 12
def jrnz():
global _fZ
if not _fZ:
incpcsb()
return 12
else:
_PC[0] = inc16(_PC[0])
return 7
def jrz():
global _fZ
if _fZ:
incpcsb()
return 12
else:
_PC[0] = inc16(_PC[0])
return 7
def jrnc():
global _fC
if not _fC:
incpcsb()
return 12
else:
_PC[0] = inc16(_PC[0])
return 7
def jrc():
global _fC
if _fC:
incpcsb()
return 12
else:
_PC[0] = inc16(_PC[0])
return 7
# LD rr,nn / ADD HL,rr
def ldbcnn():
_BC[0] = nxtpcw()
return 10
def addhlbc():
_HL[0] = add16(_HL[0], _BC[0])
return 11
def lddenn():
_DE[0] = nxtpcw()
return 10
def addhlde():
_HL[0] = add16(_HL[0], _DE[0])
return 11
def ldhlnn():
_HL[0] = nxtpcw()
return 10
def addhlhl():
hl = _HL[0]
_HL[0] = add16(hl, hl)
return 11
def ldspnn():
_SP[0] = nxtpcw()
return 10
def addhlsp():
_HL[0] = add16(_HL[0], _SP[0])
return 11
# LD (**),A/A,(**)
def ldtobca():
memory.pokeb(_BC[0], _A[0])
return 7
def ldafrombc():
_A[0] = memory.peekb(_BC[0])
return 7
def ldtodea():
memory.pokeb(_DE[0], _A[0])
return 7
def ldafromde():
_A[0] = memory.peekb(_DE[0])
return 7
def ldtonnhl():
memory.pokew(nxtpcw(), _HL[0])
return 16
def ldhlfromnn():
_HL[0] = memory.peekw(nxtpcw())
return 16
def ldtonna():
memory.pokeb(nxtpcw(), _A[0])
return 13
def ldafromnn():
_A[0] = memory.peekb(nxtpcw())
return 13
# INC/DEC *
def incbc():
_BC[0] = inc16(_BC[0])
return 6
def decbc():
_BC[0] = dec16(_BC[0])
return 6
def incde():
_DE[0] = inc16(_DE[0])
return 6
def decde():
_DE[0] = dec16(_DE[0])
return 6
def inchl():
_HL[0] = inc16(_HL[0])
return 6
def dechl():
_HL[0] = dec16(_HL[0])
return 6
def incsp():
_SP[0] = inc16(_SP[0])
return 6
def decsp():
_SP[0] = dec16(_SP[0])
return 6
# INC *
def incb():
_B[0] = inc8(_B[0])
return 4
def incc():
_C[0] = inc8(_C[0])
return 4
def incd():
_D[0] = inc8(_D[0])
return 4
def ince():
_E[0] = inc8(_E[0])
return 4
def inch():
_H[0] = inc8(_H[0])
return 4
def incl():
_L[0] = inc8(_L[0])
return 4
def incinhl():
memory.pokeb(_HL[0], inc8(memory.peekb(_HL[0])))
return 11
def inca():
_A[0] = inc8(_A[0])
return 4
# DEC *
def decb():
_B[0] = dec8(_B[0])
return 4
def decc():
_C[0] = dec8(_C[0])
return 4
def decd():
_D[0] = dec8(_D[0])
return 4
def dece():
_E[0] = dec8(_E[0])
return 4
def dech():
_H[0] = dec8(_H[0])
return 4
def decl():
_L[0] = dec8(_L[0])
return 4
def decinhl():
memory.pokeb(_HL[0], dec8(memory.peekb(_HL[0])))
return 11
def deca():
_A[0] = dec8(_A[0])
return 4
# LD *,N
def ldbn():
_B[0] = nxtpcb()
return 7
def ldcn():
_C[0] = nxtpcb()
return 7
def lddn():
_D[0] = nxtpcb()
return 7
def lden():
_E[0] = nxtpcb()
return 7
def ldhn():
_H[0] = nxtpcb()
return 7
def ldln():
_L[0] = nxtpcb()
return 7
def ldtohln():
memory.pokeb(_HL[0], nxtpcb())
return 10
def ldan():
_A[0] = nxtpcb()
return 7
# R**A
def rlca():
global _f3, _f5, _fN, _fH, _fC
ans = _A[0]
c = ans > 0x7f
ans = ((ans << 1) + (0x01 if c else 0)) % 256
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fN = False
_fH = False
_fC = c
_A[0] = ans
return 4
# Rotate Left through Carry - alters H N C 3 5 flags (CHECKED)
def rla():
global _f3, _f5, _fN, _fH, _fC
ans = _A[0]
c = ans > 0x7F
ans = ((ans << 1) + (1 if _fC else 0)) % 256
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fN = False
_fH = False
_fC = c
_A[0] = ans
return 4
# Rotate Right - alters H N C 3 5 flags (CHECKED)
def rrca():
global _f3, _f5, _fN, _fH, _fC
ans = _A[0]
c = (ans % 2) != 0
ans = ((ans >> 1) + (0x80 if c else 0)) % 256
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fN = False
_fH = False
_fC = c
_A[0] = ans
return 4
# Rotate Right through Carry - alters H N C 3 5 flags (CHECKED)
def rra():
global _f3, _f5, _fN, _fH, _fC
ans = _A[0]
c = (ans % 2) != 0
ans = ((ans >> 1) + (0x80 if _fC else 0)) % 256
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fN = False
_fH = False
_fC = c
_A[0] = ans
return 4
# Decimal Adjust Accumulator - alters all flags (CHECKED)
def daa():
global _fC, _fN, _fPV, _fH
ans = _A[0]
incr = 0
carry = _fC
if _fH or ((ans % 16) > 0x09):
incr |= 0x06
if carry or (ans > 0x9f) or ((ans > 0x8f) and ((ans % 16) > 0x09)):
incr |= 0x60
if ans > 0x99:
carry = True
if _fN:
sub_a(incr)
else:
add_a(incr)
ans = _A[0]
_fC = carry
_fPV = parity[ans]
return 4
# One's complement - alters N H 3 5 flags (CHECKED)
def cpla():
global _f3, _f5, _fH, _fN
ans = _A[0] ^ 0xff
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fH = True
_fN = True
_A[0] = ans
return 4
# Set carry flag - alters N H 3 5 C flags (CHECKED)
def scf():
global _f3, _f5, _fH, _fN, _fC
ans = _A[0]
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fN = False
_fH = False
_fC = True
return 4
# Complement carry flag - alters N 3 5 C flags (CHECKED)
def ccf():
global _f3, _f5, _fN, _fC, _fH
ans = _A[0]
_f3 = (ans & F_3) != 0
_f5 = (ans & F_5) != 0
_fH = _fC
_fC = not _fC
_fN = False
return 4
# LD B,*
def ldbb():
return 4
def ldbc():
_B[0] = _C[0]
return 4
def ldbd():
_B[0] = _D[0]
return 4
def ldbe():
_B[0] = _E[0]
return 4
def ldbh():
_B[0] = _H[0]
return 4
def ldbl():
_B[0] = _L[0]
return 4
def ldbfromhl():
_B[0] = memory.peekb(_HL[0])
return 7
def ldba():
_B[0] = _A[0]
return 4
# LD C,*
def ldcb():
_C[0] = _B[0]
return 4
def ldcc():
return 4
def ldcd():
_C[0] = _D[0]
return 4
def ldce():
_C[0] = _E[0]
return 4
def ldch():
_C[0] = _H[0]
return 4
def ldcl():
_C[0] = _L[0]
return 4
def ldcfromhl():
_C[0] = memory.peekb(_HL[0])
return 7
def ldca():
_C[0] = _A[0]
return 4
# LD D,*
def lddb():
_D[0] = _B[0]
return 4
def lddc():
_D[0] = _C[0]
return 4
def lddd():
return 4
def ldde():
_D[0] = _E[0]
return 4
def lddh():
_D[0] = _H[0]
return 4
def lddl():
_D[0] = _L[0]
return 4
def lddfromhl():
_D[0] = memory.peekb(_HL[0])
return 7
def ldda():
_D[0] = _A[0]
return 4
# LD E,*
def ldeb():
_E[0] = _B[0]
return 4
def ldec():
_E[0] = _C[0]
return 4
def lded():
_E[0] = _D[0]
return 4
def ldee():
return 4
def ldeh():
_E[0] = _H[0]
return 4
def ldel():
_E[0] = _L[0]
return 4
def ldefromhl():
_E[0] = memory.peekb(_HL[0])
return 7
def ldea():
_E[0] = _A[0]
return 4
# LD H,*
def ldhb():
_H[0] = _B[0]
return 4
def ldhc():
_H[0] = _C[0]
return 4
def ldhd():
_H[0] = _D[0]
return 4
def ldhe():
_H[0] = _E[0]
return 4
def ldhh():