1+ from typing import Any
2+
13from kirin import interp
4+ from kirin .interp import InterpreterError
5+ from kirin .dialects import ilist
26
37from bloqade .pyqrack .reg import (
48 CBitRef ,
59 CRegister ,
6- PyQrackReg ,
710 QubitState ,
811 Measurement ,
912 PyQrackQubit ,
@@ -19,14 +22,13 @@ def qreg_new(
1922 self , interp : PyQrackInterpreter , frame : interp .Frame , stmt : core .QRegNew
2023 ):
2124 n_qubits : int = frame .get (stmt .n_qubits )
22- return (
23- PyQrackReg (
24- size = n_qubits ,
25- sim_reg = interp .memory .sim_reg ,
26- addrs = interp .memory .allocate (n_qubits ),
27- qubit_state = [QubitState .Active ] * n_qubits ,
28- ),
25+ qreg = ilist .IList (
26+ [
27+ PyQrackQubit (i , interp .memory .sim_reg , QubitState .Active )
28+ for i in interp .memory .allocate (n_qubits = n_qubits )
29+ ]
2930 )
31+ return (qreg ,)
3032
3133 @interp .impl (core .CRegNew )
3234 def creg_new (
@@ -39,7 +41,9 @@ def creg_new(
3941 def qreg_get (
4042 self , interp : PyQrackInterpreter , frame : interp .Frame , stmt : core .QRegGet
4143 ):
42- return (PyQrackQubit (ref = frame .get (stmt .reg ), pos = frame .get (stmt .idx )),)
44+ reg = frame .get (stmt .reg )
45+ i = frame .get (stmt .idx )
46+ return (reg [i ],)
4347
4448 @interp .impl (core .CRegGet )
4549 def creg_get (
@@ -51,12 +55,25 @@ def creg_get(
5155 def measure (
5256 self , interp : PyQrackInterpreter , frame : interp .Frame , stmt : core .Measure
5357 ):
54- qarg : PyQrackQubit = frame .get (stmt .qarg )
55- carg : CBitRef = frame .get (stmt .carg )
56- if qarg .is_active ():
57- carg .set_value (Measurement (qarg .sim_reg .m (qarg .addr )))
58+ qarg : PyQrackQubit | ilist .IList [PyQrackQubit , Any ] = frame .get (stmt .qarg )
59+ carg : CBitRef | CRegister = frame .get (stmt .carg )
60+
61+ if isinstance (qarg , PyQrackQubit ) and isinstance (carg , CBitRef ):
62+ if qarg .is_active ():
63+ carg .set_value (Measurement (qarg .sim_reg .m (qarg .addr )))
64+ else :
65+ carg .set_value (interp .loss_m_result )
66+ elif isinstance (qarg , ilist .IList ) and isinstance (carg , CRegister ):
67+ for i , qubit in enumerate (qarg ):
68+ cbit = CBitRef (carg , i )
69+ if qubit .is_active ():
70+ cbit .set_value (Measurement (qubit .sim_reg .m (qubit .addr )))
71+ else :
72+ cbit .set_value (interp .loss_m_result )
5873 else :
59- carg .set_value (interp .loss_m_result )
74+ raise InterpreterError (
75+ f"Expected measure call on either a single qubit and classical bit, or two registers, but got the types { type (qarg )} and { type (carg )} "
76+ )
6077
6178 return ()
6279
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