Peephole optimization: Rotation gates -> U3 gates. #588
Description
QIR doesn't natively support U3 gates so we will need to be able to take a circuit that contains rotation gates and canoncialize them into U3 gates.
In order to make validation easier in certain modes of execution we shuold also try to run peephole optimizations in the Rotation gates and merge successive rotation gates into a single U3 gate.
This optimization should only work on rotation gates with constant inputs to make our lives easier since in the case of QIR we are not supporting arguments of the entry point.