diff --git a/src/bloqade/analysis/address/lattice.py b/src/bloqade/analysis/address/lattice.py
index 57c772ba..ca225b86 100644
--- a/src/bloqade/analysis/address/lattice.py
+++ b/src/bloqade/analysis/address/lattice.py
@@ -81,5 +81,5 @@ class AddressWire(Address):
 
     def is_subseteq(self, other: Address) -> bool:
         if isinstance(other, AddressWire):
-            return self.origin_qubit == self.origin_qubit
+            return self.origin_qubit == other.origin_qubit
         return False
diff --git a/test/analysis/address/test_lattice.py b/test/analysis/address/test_lattice.py
new file mode 100644
index 00000000..389f36cc
--- /dev/null
+++ b/test/analysis/address/test_lattice.py
@@ -0,0 +1,17 @@
+from bloqade.analysis.address import AddressReg, AddressWire, AddressQubit
+
+
+def test_address_wire_is_subset_eq():
+
+    origin_qubit_0 = AddressQubit(data=0)
+    address_wire_0 = AddressWire(origin_qubit=origin_qubit_0)
+
+    origin_qubit_1 = AddressQubit(data=1)
+    address_wire_1 = AddressWire(origin_qubit=origin_qubit_1)
+
+    assert address_wire_0.is_subseteq(address_wire_0)
+    assert not address_wire_0.is_subseteq(address_wire_1)
+
+    # fully exercise logic with lattice type that is not address wire
+    address_reg = AddressReg(data=[0, 1, 2, 3])
+    assert not address_wire_0.is_subseteq(address_reg)