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docs/blog/posts/2025/the-noise-strikes-back.md

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# Simulating noisy circuits for near-term quantum hardware
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We should change the name of this file eventually, but I'm excited about the final post of 2025: "Return of the Gemini."
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With recent experimental demonstrations of digital quantum circuits executed on neutral atom devices, a new era is beginning for the still nascent technology. At QuEra, we have used our newly completed Gemini-class quantum computer to demonstrate a key building block of fault-tolerant quantum computation: [magic state distillation](https://www.nature.com/articles/s41586-025-09367-3). By both leveraging the universal quantum gate-set and all-to-all connectivity offered by our hardware, while also maximizing parallelism, this work demonstrates the potential of neutral atom QPUs. As the availability of Gemini-class machines increases in the near future, it is paramount to provide researchers with tools to develop quantum circuits that are well suited for Gemini. With that goal in mind, we have released circuit-level noise models in bloqade that closely mimic the performance of the device for small system sizes, allowing for circuit optimization and feasibility checks.
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## Motivate: Gemini-class digital QPUs (Luis)
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## Motivation for Gemini-class digital QPUs
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Operating in an analog mode of quantum computation has opened to us exciting opportunities to leverage the flexibility of a neutral atom platform in exploring the application forefront (such as optimization problems, and machine learning), as well as in addressing more scientifically oriented questions (preparation of exotic phases of matter).
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Furthermore, we need full control in the quantum device to encode interactions and tunneling parameters between the fermionic modes that discretize our target molecules and materials.
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In our quest to reach this level of maturity in quantum hardware, we introduce Gemini-class devices, that incorporate digital programmability features in our neutral atom quantum computing platform.
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## Circuit-level compared to hardware-level programming (David)
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## Circuit-level compared to hardware-level programming
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Gemini-class devices are digital quantum computers.
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This allows the user to work on the circuit-level of abstraction rather than the hardware-level.
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In order to provide users with the required set of tools, we have spent considerable time researching and implementing
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an easy-to-use framework that allows you to include Gemini's particular noise processes in a high-level circuit.
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## Heuristic approach to noise (Tyler)
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## Heuristic approach to noise
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The abstraction of noise to the circuit-level allows all the noise sources on the device to be conglomerated into
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"effective" Pauli noise channels. The effective channels are heuristic in nature, designed to capture the average
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We'll discuss some underlying concepts and highlight interesting parts of the tutorial in this section.
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If you want all the details, please find [the full example here](../../../digital/examples/noisy_ghz.py).
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### Flow chart (Tyler)
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### Flow chart
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The intended workflow for using the circuit-level noise models is described in the flow chart below. The first step for
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a user interested in testing a specific quantum algorithm is to write an explicit circuit
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![cirq_utils_flowchart](./flowchart.png)
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### Annotated circuit (Luis)
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### Annotated circuit
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In practice, our heuristic noise models are used to annotate circuits with incoherent channels, with a "coarse-grained"
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awareness of hardware. As a simple example, let's consider the following that assumes noise annotation according to a
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Finally, noise is annotated after gates, where it is assumed that entangling gates are executed in hardware before single qubit gates. In doing so, qubits that are not participant in the entangling gates receive unpaired cz error (green pentagons).
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### GHZ data (David)
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### GHZ data
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Now, let's look at some results of [the example](../../../digital/examples/noisy_ghz.py) that compares the different
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noise processes.

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