@@ -191,12 +191,33 @@ bool ES8388::begin(int sda, int scl, uint32_t frequency)
191191 res &=write_reg (ES8388_ADDR, 16 , 0x00 ); // LADC volume = 0dB
192192 res &=write_reg (ES8388_ADDR, 17 , 0x00 ); // RADC volume = 0dB
193193 // ALC
194+
195+ /*
194196 res &=write_reg(ES8388_ADDR, 18, 0xE2); // ALC enable, PGA Max. Gain=23.5dB, Min. Gain=0dB
195197 res &=write_reg(ES8388_ADDR, 19, 0xA0); // ALC Target=-4.5dB, ALC Hold time=0ms
196198 res &=write_reg(ES8388_ADDR, 20, 0x12); // Decay time=820µs, Attack time=416µs
197199 res &=write_reg(ES8388_ADDR, 21, 0x06); // ALC mode
198- res &=write_reg (ES8388_ADDR, 22 , 0xC3 ); // Noise gate=-40.5dB, NGG=0x01(mute ADC)
200+ res &=write_reg(ES8388_ADDR, 22, 0xC3); // Noise gate=-40.5dB, NGG=0x01(mute ADC)
199201
202+ */
203+
204+ // 1) ALC enable, PGA max gain
205+ res &= write_reg (ES8388_ADDR, 18 , 0xE2 );
206+
207+ // 2) ALC Target = 0 dB
208+ res &= write_reg (ES8388_ADDR, 19 , 0xE0 );
209+
210+ // 3) Decay = 5,2 ms, Attack = 2,6 ms
211+ res &= write_reg (ES8388_ADDR, 20 , 0x1E );
212+
213+ // 4) ALC mode (restez en mode standard si besoin)
214+ res &= write_reg (ES8388_ADDR, 21 , 0x06 );
215+
216+ // 5) Noise gate : seuil –60 dB, hold gain, activé
217+ res &= write_reg (ES8388_ADDR, 22 , 0x5B );
218+
219+
220+
200221 // unmute
201222 write_reg (ES8388_ADDR, 25 , 0x00 ); //
202223
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