cpu/rp2350_common: create shared folder for RISCV & ARM

Author: AnnsAnns

cpu/rp2350_common/include/compat_layer.h

@@ -0,0 +1,23 @@
+#pragma once
+
+#include "periph_cpu.h"
+
+#ifdef RP2350_USE_RISCV
+#  include "xh3irq.h"
+#endif
+
+static inline void rp_irq_enable(uint32_t irq_no)
+{
+#ifdef RP2350_USE_RISCV
+    xh3irq_enable_irq(irq_no);
+#else
+    NVIC_EnableIRQ(irq_no);
+#endif
+}
+
+static inline void rp_end_isr(void)
+{
+#ifdef RP2350_USE_ARM
+    cortexm_isr_end();
+#endif
+}

cpu/rp2350_common/periph/uart.c

@@ -14,12 +14,12 @@
  * @author          Tom Hert <[email protected]>
  */
 
-#include "periph/uart.h"
-
+#include "board.h"
+#include "compat_layer.h"
 #include "periph_cpu.h"
 
 #include "regs/uart.h"
-#include <RP2350.h>
+#include "periph/uart.h"
 
 #define ENABLE_DEBUG 0
 #include "debug.h"
@@ -47,12 +47,8 @@ void _irq_enable(uart_t uart) {
     UART0_Type *dev = uart_config[uart].dev;
     /* We set the UART Receive Interrupt Mask (Bit 4) [See p979 UART 12.1]*/
     dev->UARTIMSC = UART0_UARTIMSC_RXIM_Msk;
-    /* Enable the IRQ in the NVIC */
-    #ifdef RP2350_USE_RISCV
-    xh3irq_enable_irq(uart_config[uart].irqn);
-    #else
-    NVIC_EnableIRQ(uart_config[uart].irqn);
-    #endif
+    /* Enable the IRQ */
+    rp_irq_enable(uart_config[uart].irqn);
 }
 
 int uart_mode(uart_t uart, uart_data_bits_t data_bits, uart_parity_t parity,
@@ -222,16 +218,12 @@ void isr_handler(uint8_t num) {
 /** Overwrites the WEAK_DEFAULT isr_uart0 */
 void isr_uart0(void) {
     isr_handler(0);
-    #ifdef RP2350_USE_ARM
-    cortexm_isr_end();
-    #endif
+    rp_end_isr();
 }
 
 void isr_uart1(void) {
     isr_handler(1);
-    #ifdef RP2350_USE_ARM
-    cortexm_isr_end();
-    #endif
+    rp_end_isr();
 }
 
 /** @} */