diff --git a/boards/olimexino-stm32f3/Makefile b/boards/olimexino-stm32f3/Makefile new file mode 100644 index 000000000000..f8fcbb53a065 --- /dev/null +++ b/boards/olimexino-stm32f3/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/olimexino-stm32f3/Makefile.dep b/boards/olimexino-stm32f3/Makefile.dep new file mode 100644 index 000000000000..cbb6f2b68a4c --- /dev/null +++ b/boards/olimexino-stm32f3/Makefile.dep @@ -0,0 +1,17 @@ +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif + +include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk + +ifneq (,$(filter stdio_cdc_acm,$(USEMODULE))) + # The Mask-ROM bootloader provides USB-DFU capability + FEATURES_REQUIRED += bootloader_stm32 + USEMODULE += usb_board_reset +endif + +# default to using fatfs on SD card +ifneq (,$(filter vfs_default,$(USEMODULE))) + USEMODULE += fatfs_vfs + USEMODULE += mtd +endif diff --git a/boards/olimexino-stm32f3/Makefile.features b/boards/olimexino-stm32f3/Makefile.features new file mode 100644 index 000000000000..e19494d1a6fa --- /dev/null +++ b/boards/olimexino-stm32f3/Makefile.features @@ -0,0 +1,18 @@ +CPU = stm32 +CPU_MODEL = stm32f303rc + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_can +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_usbdev + +# Various other features (if any) +FEATURES_PROVIDED += highlevel_stdio +FEATURES_PROVIDED += sdcard_spi +FEATURES_PROVIDED += tinyusb_device diff --git a/boards/olimexino-stm32f3/Makefile.include b/boards/olimexino-stm32f3/Makefile.include new file mode 100644 index 000000000000..3c523981b76a --- /dev/null +++ b/boards/olimexino-stm32f3/Makefile.include @@ -0,0 +1,29 @@ +# we use shared STM32 configuration snippets +INCLUDES += -I$(RIOTBASE)/boards/common/stm32/include + +# default to flashing over USB +PROGRAMMER ?= dfu-util +DFU_USB_ID ?= 0483:df11 +DFU_USE_DFUSE ?= 1 +ROM_OFFSET ?= 0x0 + +# CDC ACM is available faster on STM32 +TERM_DELAY ?= 1 + +# The common stlink variants do not have the 1.27 mm 10 pin SWD connector. But +# e.g. the formerly cheap J-Link EDU Mini does have this, so this likely makes +# a better default. +OPENOCD_DEBUG_ADAPTER ?= jlink + +# The reset pin on the 10 pin 1.27 mm SWD connector requires the solder bridge +# SJ5 to be manually closed to be useable. This is a good thing to do, but for +# a better out of the box experience, we disable the use of the RST pin by +# default. +OPENOCD_RESET_USE_CONNECT_ASSERT_SRST ?= 0 + +# set default port depending on operating system +PORT_LINUX ?= /dev/ttyACM0 + +# Setup of programmer and serial is shared between STM32 based boards +include $(RIOTMAKE)/boards/stm32.inc.mk +include $(RIOTMAKE)/tools/usb_board_reset.mk diff --git a/boards/olimexino-stm32f3/dist/OLIMEXINO-STM32F3_Rev_C1.svg b/boards/olimexino-stm32f3/dist/OLIMEXINO-STM32F3_Rev_C1.svg new file mode 100644 index 000000000000..f9fd65b98979 --- /dev/null +++ b/boards/olimexino-stm32f3/dist/OLIMEXINO-STM32F3_Rev_C1.svg @@ -0,0 +1,28683 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boards/olimexino-stm32f3/doc.md b/boards/olimexino-stm32f3/doc.md new file mode 100644 index 000000000000..81836366323e --- /dev/null +++ b/boards/olimexino-stm32f3/doc.md @@ -0,0 +1,56 @@ +@defgroup boards_olimexino-stm32f3 OLIMEXINO-STM32F3 +@ingroup boards +@brief Support for the OLIMEXINO-STM32F3 board + +## Overview + +The OLIMEXINO-STM32F3 is a board sporting the STM32F303RCT6 (Cortex-M4 @ 72 MHz, +FPU, 40 KiB SRAM, 256 KiB Flash) that is partially compatible with +Arduino Shields in the Arduino UNO form factor and fully compatible with UEXT +extensions. + +## Hardware + +@image html https://www.olimex.com/Products/Duino/STM32/OLIMEXINO-STM32F3/images/OLIMEXINO-STM32F3.jpg "Picture of the OLIMEXINO-STM32F3 Board" + +### MCU + +| MCU | STM32F303RC | +|:------------------------- |:------------------------------------------------- | +| Family | ARM Cortex-M4 | +| Vendor | ST Microelectronics | +| RAM | 40 KiB | +| Flash | 256 KiB | +| Frequency | up to 72 MHz, RIOT uses 72 MHz by default | +| FPU | yes | +| Advanced Control Timers | 2 × 16-bit | +| General Purpose Timers | 1 × 32-bit, 5 × 16-bit | +| Basic Timers | 2 × 16-bit | +| Watchdog Timer | 2 (Independent Watchdog + Window Watchdog) | +| SysTick Timer | Functional | +| RTC/RTT | 1 × RTC, 0 × RTT | +| RTC Memory | 64 Bytes | +| ADCs | 4 × 12-bit (22 channels) | +| DACs | 1 × 12-bit (2 channels) | +| UARTs | 5 (3 × USART, 2 × UART | +| SPIs | 3 | +| I2Ss | 2 (two SPI peripherals can be used in I2S mode) | +| I2Cs | 2 | +| CAN | 1 | +| USB | 1 | +| VCC | 2.0V - 3.6V | +| MCU Datasheet | [Datasheet][mcu-datasheet] | +| MCU Reference Manual | [Reference Manual][mcu-manual] | +| MCU Programming Manual | [Programming Manual][mcu-programming-manual] | +| Board Manual | [Board Manual][board-manual] | +| Board Schematics | [Board Schematics][board-schematics] | + +[MCU-datasheet]: https://www.st.com/resource/en/datasheet/stm32f303rc.pdf +[mcu-manual]: http://www.st.com/web/en/resource/technical/document/reference_manual/DM00043574.pdf +[mcu-programming-manual]: http://www.st.com/web/en/resource/technical/document/programming_manual/DM00046982.pdf +[board-manual]: https://github.com/OLIMEX/OLIMEXINO-STM32F3/blob/master/DOCUMENTS/OLIMEXINO-STM32F3.pdf +[board-schematics]: https://github.com/OLIMEX/OLIMEXINO-STM32F3/blob/master/HARDWARE/OLIMEXINO-STM32F3-revision-C1/OLIMEXINO-STM32F3_Rev_C1.pdf + +## Schematics + +![Schmematics of the OLIMEXINO-STM32F3 in Revision C1](dist/OLIMEXINO-STM32F3_Rev_C1.svg) diff --git a/boards/olimexino-stm32f3/include/arduino_iomap.h b/boards/olimexino-stm32f3/include/arduino_iomap.h new file mode 100644 index 000000000000..6708be502dde --- /dev/null +++ b/boards/olimexino-stm32f3/include/arduino_iomap.h @@ -0,0 +1,144 @@ +/* + * SPDX-FileCopyrightText: 2025 Marian Buschsieweke + * SPDX-License-Identifier: LGPL-2.1-only + */ + +#pragma once + +/** + * @ingroup boards_olimexino-stm32f3 + * @{ + * + * @file + * @brief Mapping from MCU pins to Arduino pins + * + * You can use the defines in this file for simplified interaction with the + * Arduino specific pin numbers. + * + * @author Marian Buschsieweke + */ + +#include "periph/adc.h" +#include "periph/gpio.h" +#include "periph/i2c.h" +#include "periph/pwm.h" +#include "periph/spi.h" +#include "periph/uart.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Arduino's UART devices + * @{ + */ +#define ARDUINO_UART_D0D1 UART_DEV(0) +/** @} */ + +/** + * @name Arduino's SPI buses + * @{ + */ +/** + * @brief SPI_DEV(0) is connected to the ISP header + */ +#define ARDUINO_SPI_ISP SPI_DEV(0) +/** @} */ + +/** + * @name Arduino's I2C buses + * @{ + */ +/** + * @brief The first I2C bus is next to the AREF pin + */ +#define ARDUINO_I2C_UNO I2C_DEV(0) +/** @} */ + +/** + * @name Mapping of MCU pins to Arduino pins + * @{ + */ +#define ARDUINO_PIN_0 GPIO_PIN(PORT_A, 3) +#define ARDUINO_PIN_1 GPIO_PIN(PORT_A, 2) +#define ARDUINO_PIN_2 GPIO_PIN(PORT_A, 0) +#define ARDUINO_PIN_3 GPIO_PIN(PORT_A, 1) +#define ARDUINO_PIN_4 GPIO_PIN(PORT_B, 5) +#define ARDUINO_PIN_5 GPIO_PIN(PORT_B, 6) +#define ARDUINO_PIN_6 GPIO_PIN(PORT_A, 8) +#define ARDUINO_PIN_7 GPIO_PIN(PORT_A, 9) + +#define ARDUINO_PIN_8 GPIO_PIN(PORT_A, 10) +#define ARDUINO_PIN_9 GPIO_PIN(PORT_B, 7) +#define ARDUINO_PIN_10 GPIO_PIN(PORT_A, 4) +#define ARDUINO_PIN_11 GPIO_PIN(PORT_A, 7) +#define ARDUINO_PIN_12 GPIO_PIN(PORT_A, 6) +#define ARDUINO_PIN_13 GPIO_PIN(PORT_A, 5) +#define ARDUINO_PIN_14 GPIO_PIN(PORT_B, 8) + +/* analog pins as digital pin: */ +#define ARDUINO_PIN_15 GPIO_PIN(PORT_C, 0) +#define ARDUINO_PIN_16 GPIO_PIN(PORT_C, 1) +#define ARDUINO_PIN_17 GPIO_PIN(PORT_C, 2) +#define ARDUINO_PIN_18 GPIO_PIN(PORT_C, 3) +#define ARDUINO_PIN_19 GPIO_PIN(PORT_C, 4) +#define ARDUINO_PIN_20 GPIO_PIN(PORT_C, 5) + +#define ARDUINO_PIN_LAST 20 +/** @} */ + +/** + * @name Aliases for analog pins + * @{ + */ +#define ARDUINO_PIN_A0 ARDUINO_PIN_15 +#define ARDUINO_PIN_A1 ARDUINO_PIN_16 +#define ARDUINO_PIN_A2 ARDUINO_PIN_17 +#define ARDUINO_PIN_A3 ARDUINO_PIN_18 +#define ARDUINO_PIN_A4 ARDUINO_PIN_19 +#define ARDUINO_PIN_A5 ARDUINO_PIN_20 +/** @} */ + +/** + * @name Mapping of Arduino analog pins to RIOT ADC lines + * @{ + */ +#define ARDUINO_A0 ADC_LINE(0) +#define ARDUINO_A1 ADC_LINE(1) +#define ARDUINO_A2 ADC_LINE(2) +#define ARDUINO_A3 ADC_LINE(3) +#define ARDUINO_A4 ADC_LINE(4) +#define ARDUINO_A5 ADC_LINE(5) + +#define ARDUINO_ANALOG_PIN_LAST 5 +/** @} */ + +/** + * @name Arduino's SPI buses + * @{ + */ +/** + * @brief SPI_DEV(0) is connected to D11/D12/D13 + */ +#define ARDUINO_SPI_D11D12D13 SPI_DEV(0) +/** @} */ + +/** + * @name UEXT Connector + * @{ + */ +#define UEXT0_PIN_3 GPIO_PIN(PORT_B, 10) /**< UEXT0: TXD pin */ +#define UEXT0_PIN_4 GPIO_PIN(PORT_B, 11) /**< UEXT0: RXD pin */ +#define UEXT0_PIN_5 GPIO_PIN(PORT_A, 9) /**< UEXT0: SCL pin */ +#define UEXT0_PIN_6 GPIO_PIN(PORT_A, 10) /**< UEXT0: SDA pin */ +#define UEXT0_PIN_7 GPIO_PIN(PORT_A, 6) /**< UEXT0: MISO pin */ +#define UEXT0_PIN_8 GPIO_PIN(PORT_A, 7) /**< UEXT0: MOSI pin */ +#define UEXT0_PIN_9 GPIO_PIN(PORT_A, 5) /**< UEXT0: SCK pin */ +#define UEXT0_PIN_10 GPIO_PIN(PORT_B, 5) /**< UEXT0: /CS pin */ +/** @} */ + +#ifdef __cplusplus +} +#endif +/** @} */ diff --git a/boards/olimexino-stm32f3/include/board.h b/boards/olimexino-stm32f3/include/board.h new file mode 100644 index 000000000000..2b186703f554 --- /dev/null +++ b/boards/olimexino-stm32f3/include/board.h @@ -0,0 +1,67 @@ +/* + * SPDX-FileCopyrightText: 2025 Marian Buschsieweke + * SPDX-License-Identifier: LGPL-2.1-only + */ + +#pragma once + +/** + * @ingroup boards_olimexino-stm32f3 + * @{ + * + * @file + * @brief Board specific definitions for the OLIMEXINO STM32F3 board + * + * @author Marian Buschsieweke + */ + +#include "cpu.h" +#include "periph_conf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name LED pin definitions and handlers + * @{ + */ +#define LED0_PIN_NUM 5 /**< GPIO pin number of green LED */ +#define LED0_PORT GPIO_PORT_A /**< GPIO port of green LED */ +#define LED0_PORT_NUM PORT_A /**< GPIO port number of green LED */ + +#define LED1_PIN_NUM 1 /**< GPIO pin number of yellow LED */ +#define LED1_PORT GPIO_PORT_A /**< GPIO port of yellow LED */ +#define LED1_PORT_NUM PORT_A /**< GPIO port number of yellow LED */ +/** @} */ + +/** + * @name User button + * @{ + */ +#define BTN0_PIN GPIO_PIN(PORT_C, 9) /**< GPIO pin of BOOT button */ +#define BTN0_MODE GPIO_IN /**< GPIO mode to configure BOOT buttonw ith */ +/** @} */ + +/** + * @name SD card interface configuration + * + * SD card interface uses SPI_DEV(0) on this board. This configuration cannot + * be overridden. + * @{ + */ +#define SDCARD_SPI_PARAM_SPI SPI_DEV(1) +#define SDCARD_SPI_PARAM_CLK GPIO_PIN(PORT_B, 13) +#define SDCARD_SPI_PARAM_MOSI GPIO_PIN(PORT_B, 15) +#define SDCARD_SPI_PARAM_MISO GPIO_PIN(PORT_B, 14) +#define SDCARD_SPI_PARAM_CS GPIO_PIN(PORT_D, 2) +#define SDCARD_SPI_PARAM_POWER GPIO_UNDEF +/** @} */ + +#ifdef __cplusplus +} +#endif + +#include "stm32_leds.h" + +/** @} */ diff --git a/boards/olimexino-stm32f3/include/gpio_params.h b/boards/olimexino-stm32f3/include/gpio_params.h new file mode 100644 index 000000000000..876250a57659 --- /dev/null +++ b/boards/olimexino-stm32f3/include/gpio_params.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: 2025 Marian Buschsieweke + * SPDX-License-Identifier: LGPL-2.1-only + */ + +#pragma once + +/** + * @ingroup boards_olimexino-stm32f3 + * @{ + * + * @file + * @brief Board specific configuration of direct mapped GPIOs + * + * @author Marian Buschsieweke + */ + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GPIO pin configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "green LED", + .pin = LED0_PIN, + .mode = GPIO_OUT + }, + { + .name = "yellow LED", + .pin = LED1_PIN, + .mode = GPIO_OUT + }, + { + .name = "BOOT (SW1)", + .pin = BTN0_PIN, + .mode = BTN0_MODE + }, +}; + +#ifdef __cplusplus +} +#endif +/** @} */ diff --git a/boards/olimexino-stm32f3/include/periph_conf.h b/boards/olimexino-stm32f3/include/periph_conf.h new file mode 100644 index 000000000000..9941c708f402 --- /dev/null +++ b/boards/olimexino-stm32f3/include/periph_conf.h @@ -0,0 +1,271 @@ +/* + * SPDX-FileCopyrightText: 2025 Marian Buschsieweke + * SPDX-License-Identifier: LGPL-2.1-only + */ + +#pragma once + +/** + * @ingroup boards_olimexino-stm32f3 + * @{ + * + * @file + * @brief Peripheral MCU configuration for the OLIMEXINO STM32F3 board + * + * @author Marian Buschsieweke + */ + +/* This board provides an LSE */ +#ifndef CONFIG_BOARD_HAS_LSE +# define CONFIG_BOARD_HAS_LSE 1 +#endif + +/* This board provides an HSE */ +#ifndef CONFIG_BOARD_HAS_HSE +# define CONFIG_BOARD_HAS_HSE 1 +#endif + +/* Configure clock to run at 8 MHz / 1 * 9 = 72 MHz, which is the maximum + * freq and compatible with USB */ +#if !defined(CONFIG_CLOCK_PLL_PREDIV) && !defined(CONFIG_CLOCK_PLL_MUL) +# define CONFIG_CLOCK_PLL_PREDIV 1 +# define CONFIG_CLOCK_PLL_MUL 9 +#endif + +#include "periph_cpu.h" +#include "clk_conf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name ADC configuration + * @{ + */ +static const adc_conf_t adc_config[] = { + { GPIO_PIN(PORT_C, 0), 0, 10 }, + { GPIO_PIN(PORT_C, 1), 0, 11 }, + { GPIO_PIN(PORT_C, 2), 0, 12 }, + { GPIO_PIN(PORT_C, 3), 0, 13 }, + { GPIO_PIN(PORT_C, 4), 0, 14 }, + { GPIO_PIN(PORT_C, 5), 0, 15 } +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + +/** + * @name PWM configuration + * @{ + */ +static const pwm_conf_t pwm_config[] = { + { + .dev = TIM15, + .rcc_mask = RCC_APB2ENR_TIM15EN, + .chan = { { .pin = GPIO_PIN(PORT_A, 3), .cc_chan = 1 }, /* D0 */ + { .pin = GPIO_PIN(PORT_A, 2), .cc_chan = 0 } }, /* D1 */ + .af = GPIO_AF9, + .bus = APB2 + }, + { + .dev = TIM4, + .rcc_mask = RCC_APB1ENR_TIM4EN, + .chan = { { .pin = GPIO_PIN(PORT_B, 6), .cc_chan = 0 }, /* D6 */ + { .pin = GPIO_PIN(PORT_B, 7), .cc_chan = 1 } }, /* D9 */ + .af = GPIO_AF2, + .bus = APB1 + } +}; + +#define PWM_NUMOF ARRAY_SIZE(pwm_config) +/** @} */ + +/** + * @name Timer configuration + * @{ + */ +static const timer_conf_t timer_config[] = { + { + .dev = TIM2, + .max = UINT32_MAX, + .rcc_mask = RCC_APB1ENR_TIM2EN, + .bus = APB1, + .irqn = TIM2_IRQn + }, + { + .dev = TIM1, + .max = UINT16_MAX, + .rcc_mask = RCC_APB2ENR_TIM1EN, + .bus = APB2, + .irqn = TIM1_CC_IRQn + }, + { + .dev = TIM3, + .max = UINT16_MAX, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .bus = APB1, + .irqn = TIM3_IRQn + }, + { + .dev = TIM8, + .max = UINT16_MAX, + .rcc_mask = RCC_APB2ENR_TIM8EN, + .bus = APB2, + .irqn = TIM8_CC_IRQn + }, +}; + +#define TIMER_0_ISR isr_tim2 +#define TIMER_1_ISR isr_tim1_cc +#define TIMER_2_ISR isr_tim3 +#define TIMER_3_ISR isr_tim8_cc + +#define TIMER_NUMOF ARRAY_SIZE(timer_config) +/** @} */ + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART2, + .rcc_mask = RCC_APB1ENR_USART2EN, + .rx_pin = GPIO_PIN(PORT_A, 3), + .tx_pin = GPIO_PIN(PORT_A, 2), + .bus = APB1, + .irqn = USART2_IRQn + }, + { + .dev = USART1, + .rcc_mask = RCC_APB2ENR_USART1EN, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .bus = APB2, + .irqn = USART1_IRQn + }, + { + .dev = USART3, + .rcc_mask = RCC_APB1ENR_USART3EN, + .rx_pin = GPIO_PIN(PORT_B, 11), + .tx_pin = GPIO_PIN(PORT_B, 10), + .bus = APB1, + .irqn = USART3_IRQn + } +}; + +#define UART_0_ISR (isr_usart2) +#define UART_1_ISR (isr_usart1) +#define UART_2_ISR (isr_usart3) + +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** + * @name Real time counter configuration + * @{ + */ +#ifndef RTT_FREQUENCY +# define RTT_FREQUENCY (32768) /* in Hz */ +#endif +/** @} */ + +/** + * @name I2C configuration + * @note This board may require external pullup resistors for i2c operation. + * @{ + */ + +static const i2c_conf_t i2c_config[] = { + { + .dev = I2C2, + .speed = I2C_SPEED_NORMAL, + .scl_pin = GPIO_PIN(PORT_A, 9), + .sda_pin = GPIO_PIN(PORT_A, 10), + .scl_af = GPIO_AF4, + .sda_af = GPIO_AF4, + .bus = APB1, + .rcc_mask = RCC_APB1ENR_I2C2EN, + .rcc_sw_mask = RCC_CFGR3_I2C2SW, + .irqn = I2C2_ER_IRQn + }, +}; + +#define I2C_0_ISR isr_i2c2_ev + +#define I2C_NUMOF ARRAY_SIZE(i2c_config) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_A, 7), + .miso_pin = GPIO_PIN(PORT_A, 6), + .sclk_pin = GPIO_PIN(PORT_A, 5), + .cs_pin = GPIO_PIN(PORT_A, 4), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + }, + { + .dev = SPI2, + .mosi_pin = GPIO_PIN(PORT_B, 15), + .miso_pin = GPIO_PIN(PORT_B, 14), + .sclk_pin = GPIO_PIN(PORT_B, 13), + .cs_pin = GPIO_PIN(PORT_B, 12), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB1ENR_SPI2EN, + .apbbus = APB1 + }, +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name USB configuration + * @{ + */ +/** + * @brief USB device FS configuration + */ +static const stm32_usbdev_fs_config_t stm32_usbdev_fs_config[] = { + { + .base_addr = (uintptr_t)USB, + .rcc_mask = RCC_APB1ENR_USBEN, + .irqn = USB_LP_CAN_RX0_IRQn, + .apb = APB1, + .dm = GPIO_PIN(PORT_A, 11), + .dp = GPIO_PIN(PORT_A, 12), + .af = GPIO_AF14, + .disconn = GPIO_PIN(PORT_C, 12), + .flags = STM32_USBDEV_FS_CONFIG_FLAG_DISCONN_INVERTED, + }, +}; + +/** + * @brief Interrupt function name mapping + */ +#define USBDEV_ISR isr_usb_lp_can_rx0 + +/** + * @brief Number of available USB device FS peripherals + */ +#define USBDEV_NUMOF ARRAY_SIZE(stm32_usbdev_fs_config) +/** @} */ + +#ifdef __cplusplus +} +#endif +/** @} */ diff --git a/cpu/stm32/include/clk/clk_conf.h b/cpu/stm32/include/clk/clk_conf.h index 468444e10bdd..c61aa13df390 100644 --- a/cpu/stm32/include/clk/clk_conf.h +++ b/cpu/stm32/include/clk/clk_conf.h @@ -17,23 +17,23 @@ #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \ defined(CPU_FAM_STM32F3) -#include "f0f1f3/cfg_clock_default.h" +#include "f0f1f3/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || \ defined(CPU_FAM_STM32F7) -#include "f2f4f7/cfg_clock_default.h" +#include "f2f4f7/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) -#include "g0g4/cfg_clock_default.h" +#include "g0g4/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32C0) -#include "c0/cfg_clock_default.h" +#include "c0/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) -#include "l0l1/cfg_clock_default.h" +#include "l0l1/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \ defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32WL) -#include "l4l5wx/cfg_clock_default.h" +#include "l4l5wx/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32U5) -#include "u5/cfg_clock_default.h" +#include "u5/cfg_clock_default.h" /* IWYU pragma: export */ #elif defined(CPU_FAM_STM32MP1) -#include "mp1/cfg_clock_default.h" +#include "mp1/cfg_clock_default.h" /* IWYU pragma: export */ #else #error "No clock configuration available" #endif diff --git a/cpu/stm32/periph/usbdev_fs.c b/cpu/stm32/periph/usbdev_fs.c index 87fd00bf2cc2..24318a0ff7e9 100644 --- a/cpu/stm32/periph/usbdev_fs.c +++ b/cpu/stm32/periph/usbdev_fs.c @@ -351,9 +351,10 @@ static void _usbdev_init(usbdev_t *dev) const stm32_usbdev_fs_config_t *conf = usbdev->config; DEBUG_PUTS("usbdev_fs: initialization"); - /* Block STOP/STANDBY */ + /* Block STOP + STANDBY + IDLE */ pm_block(STM32_PM_STOP); pm_block(STM32_PM_STANDBY); + pm_block(STM32_PM_IDLE); #if defined(RCC_CFGR_USBPRE) /* If `RCC_CFGR_USBPRE` is defined, the USB device FS clock of 48 MHz is