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JasonTTangJason Tang
JasonTTang
and
Jason Tang
authored
SWDEV-510099 - Clean up some gfx8 code (#13)
* SWDEV-510099 - Clean up some gfx8 code Change-Id: I6a99795033fd0bfc2e370dff6b597ffca0896e6b * SWDEV-510099 - Replace Tab with Spaces Change-Id: I7b1609122ab08bfc56b774203c24c0d295345504 --------- Co-authored-by: Jason Tang <jatang@amd.com>
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7 files changed

+103
-413
lines changed

7 files changed

+103
-413
lines changed

‎gfxip/gfx10/gfx10_primitives.h‎

Lines changed: 0 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -16,18 +16,8 @@ class gfx10_cntx_prim {
1616
static const uint32_t COMPUTE_PERFCOUNT_ENABLE_ADDR = mmCOMPUTE_PERFCOUNT_ENABLE;
1717
static const uint32_t RLC_PERFMON_CLK_CNTL_ADDR = mmRLC_PERFMON_CLK_CNTL;
1818
static const uint32_t CP_PERFMON_CNTL_ADDR = mmCP_PERFMON_CNTL;
19-
static const uint32_t SRBM_PERFMON_CNTL_ADDR = 0;
2019
static const uint32_t COMPUTE_THREAD_TRACE_ENABLE_ADDR = mmCOMPUTE_THREAD_TRACE_ENABLE;
2120

22-
static const uint32_t MC_CONFIG_MCD_ADDR = 0;
23-
static const uint32_t MC_SEQ_SELECT_ADDR = 0;
24-
static const uint32_t MC_SEQ_SELECT1_ADDR = 0;
25-
static const uint32_t MC_SEQ_CONTROL_ADDR = 0;
26-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_ADDR = 0;
27-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M1_ADDR = 0;
28-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M2_ADDR = 0;
29-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M3_ADDR = 0;
30-
3121
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK_PRM = 0x01000000L;
3222
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK_PRM = 0x02000000L;
3323

@@ -285,36 +275,9 @@ class gfx10_cntx_prim {
285275
// MC Block primitives
286276

287277
// MC Channel value
288-
static uint32_t mc_channel_mask(const counter_des_t& counter_des) {
289-
return 3;
290-
}
291-
static uint32_t mc_broadcast_mcd_value() { return 0; }
292278
static uint32_t mc_config_value(const counter_des_t& counter_des) {
293279
return counter_des.index;
294280
}
295-
// The following function is unused in gfx9.
296-
static uint32_t mc_seq_config_val(const counter_des_t& counter_des) {
297-
return 0;
298-
}
299-
static uint32_t mc_hbm_broadcast_mcd_value() { return 0; }
300-
301-
// MC SQE registers values
302-
static uint32_t mc_seq_reset_value() { return 0; }
303-
static uint32_t mc_seq_start_value() { return 0; }
304-
static uint32_t mc_seq_select_value(const counter_des_t&) { return 0; }
305-
static uint32_t mc_seq_select1_value(const counter_des_t&) { return 0; }
306-
static uint32_t mc_seq_hbm_reset_value() { return 0; }
307-
static uint32_t mc_seq_hbm_start_value() { return 0; }
308-
static uint32_t mc_seq_hbm_stop_value() { return 0; }
309-
static uint32_t mc_config_mcd_select_value(const counter_des_t&) { return 0; }
310-
static uint32_t mc_seq_perfcounter_cfg_addr(const counter_des_t&) { return 0; }
311-
static uint32_t mc_seq_perfcounter_select_value(const counter_des_t&) { return 0; }
312-
static uint32_t mc_config_mcd_hbm_sample_value(const counter_des_t&) { return 0; }
313-
static uint32_t mc_seq_hbm_sample_value(const counter_des_t&) { return 0; }
314-
static uint32_t mc_seq_perfcounter_rslt_cntl_addr(const counter_des_t&) { return 0; }
315-
static uint32_t mc_seq_perfcounter_rslt_cntl_value(const counter_des_t&) { return 0; }
316-
static uint32_t mc_hbm_register_lo_addr(const counter_des_t& counter_des) { return 0; }
317-
static uint32_t mc_hbm_register_hi_addr(const counter_des_t& counter_des) { return 0; }
318281

319282
// MC registers values
320283
template <typename Select> static uint32_t mc_select_value(const counter_des_t& counter_des) {
@@ -385,11 +348,6 @@ class gfx10_cntx_prim {
385348
return incr_idx;
386349
}
387350

388-
// SRBM Registers values
389-
static uint32_t srbm_reset_value() { return 0; }
390-
static uint32_t srbm_start_value() { return 0; }
391-
static uint32_t srbm_stop_value() { return 0; }
392-
393351
// GUS primitives
394352
static uint32_t gus_disable_clear_value() {
395353
regGUS_PERFCOUNTER_RSLT_CNTL gus_perfcounter_rslt_cntl{};

‎gfxip/gfx11/gfx11_primitives.h‎

Lines changed: 1 addition & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -16,19 +16,9 @@ class gfx11_cntx_prim {
1616
static const uint32_t COMPUTE_PERFCOUNT_ENABLE_ADDR = mmCOMPUTE_PERFCOUNT_ENABLE;
1717
static const uint32_t RLC_PERFMON_CLK_CNTL_ADDR = mmRLC_PERFMON_CNTL; //mmRLC_PERFMON_CLK_CNTL;
1818
static const uint32_t CP_PERFMON_CNTL_ADDR = mmCP_PERFMON_CNTL;
19-
static const uint32_t SRBM_PERFMON_CNTL_ADDR = 0;
2019

2120
static const uint32_t COMPUTE_THREAD_TRACE_ENABLE_ADDR = mmCOMPUTE_THREAD_TRACE_ENABLE;
2221

23-
static const uint32_t MC_CONFIG_MCD_ADDR = 0;
24-
static const uint32_t MC_SEQ_SELECT_ADDR = 0;
25-
static const uint32_t MC_SEQ_SELECT1_ADDR = 0;
26-
static const uint32_t MC_SEQ_CONTROL_ADDR = 0;
27-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_ADDR = 0;
28-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M1_ADDR = 0;
29-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M2_ADDR = 0;
30-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M3_ADDR = 0;
31-
3222
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK_PRM = 0x01000000L;
3323
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK_PRM = 0x02000000L;
3424

@@ -303,36 +293,9 @@ class gfx11_cntx_prim {
303293
// MC Block primitives
304294

305295
// MC Channel value
306-
static uint32_t mc_channel_mask(const counter_des_t& counter_des) {
307-
return 3;
308-
}
309-
static uint32_t mc_broadcast_mcd_value() { return 0; }
310296
static uint32_t mc_config_value(const counter_des_t& counter_des) {
311297
return counter_des.index;
312298
}
313-
// The following function is unused in gfx9.
314-
static uint32_t mc_seq_config_val(const counter_des_t& counter_des) {
315-
return 0;
316-
}
317-
static uint32_t mc_hbm_broadcast_mcd_value() { return 0; }
318-
319-
// MC SQE registers values
320-
static uint32_t mc_seq_reset_value() { return 0; }
321-
static uint32_t mc_seq_start_value() { return 0; }
322-
static uint32_t mc_seq_select_value(const counter_des_t&) { return 0; }
323-
static uint32_t mc_seq_select1_value(const counter_des_t&) { return 0; }
324-
static uint32_t mc_seq_hbm_reset_value() { return 0; }
325-
static uint32_t mc_seq_hbm_start_value() { return 0; }
326-
static uint32_t mc_seq_hbm_stop_value() { return 0; }
327-
static uint32_t mc_config_mcd_select_value(const counter_des_t&) { return 0; }
328-
static uint32_t mc_seq_perfcounter_cfg_addr(const counter_des_t&) { return 0; }
329-
static uint32_t mc_seq_perfcounter_select_value(const counter_des_t&) { return 0; }
330-
static uint32_t mc_config_mcd_hbm_sample_value(const counter_des_t&) { return 0; }
331-
static uint32_t mc_seq_hbm_sample_value(const counter_des_t&) { return 0; }
332-
static uint32_t mc_seq_perfcounter_rslt_cntl_addr(const counter_des_t&) { return 0; }
333-
static uint32_t mc_seq_perfcounter_rslt_cntl_value(const counter_des_t&) { return 0; }
334-
static uint32_t mc_hbm_register_lo_addr(const counter_des_t& counter_des) { return 0; }
335-
static uint32_t mc_hbm_register_hi_addr(const counter_des_t& counter_des) { return 0; }
336299

337300
// MC registers values
338301
template <typename Select> static uint32_t mc_select_value(const counter_des_t& counter_des) {
@@ -403,11 +366,6 @@ class gfx11_cntx_prim {
403366
return incr_idx;
404367
}
405368

406-
// SRBM Registers values
407-
static uint32_t srbm_reset_value() { return 0; }
408-
static uint32_t srbm_start_value() { return 0; }
409-
static uint32_t srbm_stop_value() { return 0; }
410-
411369
// GUS primitives
412370
static uint32_t gus_disable_clear_value() {
413371
regGUS_PERFCOUNTER_RSLT_CNTL gus_perfcounter_rslt_cntl{};
@@ -530,7 +488,7 @@ class gfx11_cntx_prim {
530488
return cp_perfmon_cntl.u32All;
531489
}
532490
static uint32_t rlc_spm_muxsel_data(const uint32_t& value, const counter_des_t& counter_des,
533-
const uint32_t& block, const uint32_t& hi) {
491+
const uint32_t& block, const uint32_t& hi) {
534492
#if 0
535493
RLC_SPM_SE_MUXSEL_DATA data{};
536494
data.u32All = value;

‎gfxip/gfx12/gfx12_primitives.h‎

Lines changed: 1 addition & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -16,16 +16,6 @@ class gfx12_cntx_prim {
1616
static const uint32_t COMPUTE_PERFCOUNT_ENABLE_ADDR = mmCOMPUTE_PERFCOUNT_ENABLE;
1717
static const uint32_t RLC_PERFMON_CLK_CNTL_ADDR = mmRLC_PERFMON_CNTL; //mmRLC_PERFMON_CLK_CNTL;
1818
static const uint32_t CP_PERFMON_CNTL_ADDR = mmCP_PERFMON_CNTL;
19-
static const uint32_t SRBM_PERFMON_CNTL_ADDR = 0;
20-
21-
static const uint32_t MC_CONFIG_MCD_ADDR = 0;
22-
static const uint32_t MC_SEQ_SELECT_ADDR = 0;
23-
static const uint32_t MC_SEQ_SELECT1_ADDR = 0;
24-
static const uint32_t MC_SEQ_CONTROL_ADDR = 0;
25-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_ADDR = 0;
26-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M1_ADDR = 0;
27-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M2_ADDR = 0;
28-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M3_ADDR = 0;
2919

3020
static const uint32_t COMPUTE_THREAD_TRACE_ENABLE_ADDR = mmCOMPUTE_THREAD_TRACE_ENABLE;
3121

@@ -304,36 +294,9 @@ class gfx12_cntx_prim {
304294
// MC Block primitives
305295

306296
// MC Channel value
307-
static uint32_t mc_channel_mask(const counter_des_t& counter_des) {
308-
return 3;
309-
}
310-
static uint32_t mc_broadcast_mcd_value() { return 0; }
311297
static uint32_t mc_config_value(const counter_des_t& counter_des) {
312298
return counter_des.index;
313299
}
314-
// The following function is unused in gfx9.
315-
static uint32_t mc_seq_config_val(const counter_des_t& counter_des) {
316-
return 0;
317-
}
318-
static uint32_t mc_hbm_broadcast_mcd_value() { return 0; }
319-
320-
// MC SQE registers values
321-
static uint32_t mc_seq_reset_value() { return 0; }
322-
static uint32_t mc_seq_start_value() { return 0; }
323-
static uint32_t mc_seq_select_value(const counter_des_t&) { return 0; }
324-
static uint32_t mc_seq_select1_value(const counter_des_t&) { return 0; }
325-
static uint32_t mc_seq_hbm_reset_value() { return 0; }
326-
static uint32_t mc_seq_hbm_start_value() { return 0; }
327-
static uint32_t mc_seq_hbm_stop_value() { return 0; }
328-
static uint32_t mc_config_mcd_select_value(const counter_des_t&) { return 0; }
329-
static uint32_t mc_seq_perfcounter_cfg_addr(const counter_des_t&) { return 0; }
330-
static uint32_t mc_seq_perfcounter_select_value(const counter_des_t&) { return 0; }
331-
static uint32_t mc_config_mcd_hbm_sample_value(const counter_des_t&) { return 0; }
332-
static uint32_t mc_seq_hbm_sample_value(const counter_des_t&) { return 0; }
333-
static uint32_t mc_seq_perfcounter_rslt_cntl_addr(const counter_des_t&) { return 0; }
334-
static uint32_t mc_seq_perfcounter_rslt_cntl_value(const counter_des_t&) { return 0; }
335-
static uint32_t mc_hbm_register_lo_addr(const counter_des_t& counter_des) { return 0; }
336-
static uint32_t mc_hbm_register_hi_addr(const counter_des_t& counter_des) { return 0; }
337300

338301
// MC registers values
339302
template <typename Select> static uint32_t mc_select_value(const counter_des_t& counter_des) {
@@ -404,11 +367,6 @@ class gfx12_cntx_prim {
404367
return incr_idx;
405368
}
406369

407-
// SRBM Registers values
408-
static uint32_t srbm_reset_value() { return 0; }
409-
static uint32_t srbm_start_value() { return 0; }
410-
static uint32_t srbm_stop_value() { return 0; }
411-
412370
// SDMA primitives
413371
static uint32_t sdma_enable_value() {
414372
//regSDMA0_PERFMON_CNTL sdma_perfmon_cntl{};
@@ -503,7 +461,7 @@ class gfx12_cntx_prim {
503461
return cp_perfmon_cntl.u32All;
504462
}
505463
static uint32_t rlc_spm_muxsel_data(const uint32_t& value, const counter_des_t& counter_des,
506-
const uint32_t& block, const uint32_t& hi) {
464+
const uint32_t& block, const uint32_t& hi) {
507465
#if 0
508466
RLC_SPM_SE_MUXSEL_DATA data{};
509467
data.u32All = value;

‎gfxip/gfx9/gfx9_primitives.h‎

Lines changed: 0 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -14,16 +14,6 @@ class gfx9_cntx_prim {
1414
static const uint32_t COMPUTE_PERFCOUNT_ENABLE_ADDR = mmCOMPUTE_PERFCOUNT_ENABLE;
1515
static const uint32_t RLC_PERFMON_CLK_CNTL_ADDR = mmRLC_PERFMON_CLK_CNTL;
1616
static const uint32_t CP_PERFMON_CNTL_ADDR = mmCP_PERFMON_CNTL;
17-
static const uint32_t SRBM_PERFMON_CNTL_ADDR = 0;
18-
19-
static const uint32_t MC_CONFIG_MCD_ADDR = 0;
20-
static const uint32_t MC_SEQ_SELECT_ADDR = 0;
21-
static const uint32_t MC_SEQ_SELECT1_ADDR = 0;
22-
static const uint32_t MC_SEQ_CONTROL_ADDR = 0;
23-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_ADDR = 0;
24-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M1_ADDR = 0;
25-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M2_ADDR = 0;
26-
static const uint32_t MC_SEQ_PERFCOUNTER_RSLT_CNTL_M3_ADDR = 0;
2717

2818
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK_PRM = 0x01000000L;
2919
static const uint32_t MC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK_PRM = 0x02000000L;
@@ -301,36 +291,9 @@ class gfx9_cntx_prim {
301291
// MC Block primitives
302292

303293
// MC Channel value
304-
static uint32_t mc_channel_mask(const counter_des_t& counter_des) {
305-
return 3;
306-
}
307-
static uint32_t mc_broadcast_mcd_value() { return 0; }
308294
static uint32_t mc_config_value(const counter_des_t& counter_des) {
309295
return counter_des.index;
310296
}
311-
// The following function is unused in gfx9.
312-
static uint32_t mc_seq_config_val(const counter_des_t& counter_des) {
313-
return 0;
314-
}
315-
static uint32_t mc_hbm_broadcast_mcd_value() { return 0; }
316-
317-
// MC SQE registers values
318-
static uint32_t mc_seq_reset_value() { return 0; }
319-
static uint32_t mc_seq_start_value() { return 0; }
320-
static uint32_t mc_seq_select_value(const counter_des_t&) { return 0; }
321-
static uint32_t mc_seq_select1_value(const counter_des_t&) { return 0; }
322-
static uint32_t mc_seq_hbm_reset_value() { return 0; }
323-
static uint32_t mc_seq_hbm_start_value() { return 0; }
324-
static uint32_t mc_seq_hbm_stop_value() { return 0; }
325-
static uint32_t mc_config_mcd_select_value(const counter_des_t&) { return 0; }
326-
static uint32_t mc_seq_perfcounter_cfg_addr(const counter_des_t&) { return 0; }
327-
static uint32_t mc_seq_perfcounter_select_value(const counter_des_t&) { return 0; }
328-
static uint32_t mc_config_mcd_hbm_sample_value(const counter_des_t&) { return 0; }
329-
static uint32_t mc_seq_hbm_sample_value(const counter_des_t&) { return 0; }
330-
static uint32_t mc_seq_perfcounter_rslt_cntl_addr(const counter_des_t&) { return 0; }
331-
static uint32_t mc_seq_perfcounter_rslt_cntl_value(const counter_des_t&) { return 0; }
332-
static uint32_t mc_hbm_register_lo_addr(const counter_des_t& counter_des) { return 0; }
333-
static uint32_t mc_hbm_register_hi_addr(const counter_des_t& counter_des) { return 0; }
334297

335298
// MC registers values
336299
template <typename Select> static uint32_t mc_select_value(const counter_des_t& counter_des) {
@@ -401,11 +364,6 @@ class gfx9_cntx_prim {
401364
return incr_idx;
402365
}
403366

404-
// SRBM Registers values
405-
static uint32_t srbm_reset_value() { return 0; }
406-
static uint32_t srbm_start_value() { return 0; }
407-
static uint32_t srbm_stop_value() { return 0; }
408-
409367
// SDMA primitives
410368
static uint32_t sdma_disable_clear_value() {
411369
#if defined(_mi100_SDMA_OFFSET_HEADER)

‎gfxip/gpu_block_info.h‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -15,14 +15,8 @@ enum CounterBlockAttr {
1515
CounterBlockCleanAttr = 8,
1616
// MC Block
1717
CounterBlockMcAttr = 0x10,
18-
// MC SEQ Block
19-
CounterBlockMcSeqAttr = 0x20,
20-
// MC SEQ HBM Block
21-
CounterBlockMcSeqHbmAttr = 0x40,
2218
// CP PERFMON controllable blocks
23-
CounterBlockCpmonAttr = 0x7f,
24-
// SRBM Block
25-
CounterBlockSrbmAttr = 0x80,
19+
CounterBlockCpmonAttr = 0x1f,
2620
// SDMA block
2721
CounterBlockSdmaAttr = 0x100,
2822
// Texture cache

‎src/def/gpu_block_info.h‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -16,14 +16,8 @@ enum CounterBlockAttr {
1616
CounterBlockCleanAttr = 8,
1717
// MC Block
1818
CounterBlockMcAttr = 0x10,
19-
// MC SEQ Block
20-
CounterBlockMcSeqAttr = 0x20,
21-
// MC SEQ HBM Block
22-
CounterBlockMcSeqHbmAttr = 0x40,
2319
// CP PERFMON controllable blocks
24-
CounterBlockCpmonAttr = 0x7f,
25-
// SRBM Block
26-
CounterBlockSrbmAttr = 0x80,
20+
CounterBlockCpmonAttr = 0x1f,
2721
// SDMA block
2822
CounterBlockSdmaAttr = 0x100,
2923
// Texture cache

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