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[pmc_builder] Centralize the programming for GFX_INDEX and PERFMON_CNTL (#133)
Prepare multiple GC instances with different programming sequence for GFX_INDEX and PERFMON_CNTL.
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‎src/pm4/pmc_builder.h‎

Lines changed: 32 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,21 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
182182
}
183183
}
184184

185+
// 'attr' is reserved for future expansion
186+
void SetGrbmGfxIndex(CmdBuffer* cmd_buffer, uint32_t value, uint32_t attr = 0) {
187+
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, value);
188+
}
189+
190+
// 'attr' is reserved for future expansion
191+
void SetGrbmBroadcast(CmdBuffer* cmd_buffer, uint32_t attr = 0) {
192+
SetGrbmGfxIndex(cmd_buffer, Primitives::grbm_broadcast_value());
193+
}
194+
195+
void SetPerfmonCntl(CmdBuffer* cmd_buffer, uint32_t value, uint32_t attr) {
196+
if (attr & CounterBlockCpmonAttr)
197+
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR, value);
198+
}
199+
185200
public:
186201
explicit GpuPmcBuilder(const AgentInfo* agent_info)
187202
: PmcBuilder(),
@@ -224,16 +239,13 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
224239
// Issue barrier command
225240
if (!concurrent) builder.BuildWriteWaitIdlePacket(cmd_buffer);
226241
// Reset Grbm to its default state - broadcast
227-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
228-
Primitives::grbm_broadcast_value());
242+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
229243
// Disable RLC Perfmon Clock Gating
230244
// On Vega this is needed to collect Perf Cntrs
231245
if (Primitives::GFXIP_LEVEL == 9)
232246
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::RLC_PERFMON_CLK_CNTL_ADDR, 1);
233247
// Reset perf counters
234-
if (counters_vec.get_attr() & CounterBlockCpmonAttr)
235-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR,
236-
Primitives::cp_perfmon_cntl_reset_value());
248+
SetPerfmonCntl(cmd_buffer, Primitives::cp_perfmon_cntl_reset_value(), counters_vec.get_attr());
237249
// Enable SQ Counter Control enable perfomance counter in graphics pipeline if implied
238250
Primitives::validate_counters(counters_vec.get_attr());
239251
if (counters_vec.get_attr() & CounterBlockTcAttr) {
@@ -292,8 +304,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
292304
const uint32_t grbm_value = (block_info->instance_count > 1 && !(block_info->attr & CounterBlockWgpAttr))
293305
? Primitives::grbm_inst_index_value(block_des.index)
294306
: Primitives::grbm_broadcast_value();
295-
296-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, grbm_value);
307+
SetGrbmGfxIndex(cmd_buffer, grbm_value, block_info->attr);
297308
// Reset counters
298309
if (block_info->attr & CounterBlockMcAttr) {
299310
builder.BuildWritePConfigRegPacket(cmd_buffer, reg_info.control_addr,
@@ -465,19 +476,14 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
465476
if (!atcs.empty()) start_generic_mc_counters(cmd_buffer, atcs);
466477

467478
// Reset Grbm to its default state - broadcast
468-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
469-
Primitives::grbm_broadcast_value());
479+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
470480
// Program Compute Perfcount Enable register to support perf counting
471481
builder.BuildWriteShRegPacket(cmd_buffer, Primitives::COMPUTE_PERFCOUNT_ENABLE_ADDR,
472482
Primitives::cp_perfcount_enable_value());
473483
// Reset the counter list
474-
if (counters_vec.get_attr() & CounterBlockCpmonAttr)
475-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR,
476-
Primitives::cp_perfmon_cntl_reset_value());
484+
SetPerfmonCntl(cmd_buffer, Primitives::cp_perfmon_cntl_reset_value(), counters_vec.get_attr());
477485
// Start the counter list
478-
if (counters_vec.get_attr() & CounterBlockCpmonAttr)
479-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR,
480-
Primitives::cp_perfmon_cntl_start_value());
486+
SetPerfmonCntl(cmd_buffer, Primitives::cp_perfmon_cntl_start_value(), counters_vec.get_attr());
481487
// Issue barrier command to apply the commands to configure perfcounters
482488
if (!concurrent) builder.BuildWriteWaitIdlePacket(cmd_buffer);
483489
}
@@ -486,8 +492,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
486492
uint32_t ReadXccPackets(CmdBuffer* cmd_buffer, const counters_vector& counters_vec,
487493
void* data_buffer, uint32_t& read_counter) {
488494
// Reset Grbm to its default state - broadcast
489-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
490-
Primitives::grbm_broadcast_value());
495+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
491496

492497
if (Primitives::GFXIP_LEVEL == 10) {
493498
for (auto& elem : counters_vec) {
@@ -527,14 +532,13 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
527532
}
528533

529534
// Reset Grbm to its default state - broadcast
530-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
531-
Primitives::grbm_broadcast_value());
535+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
532536

533537
if (block_info->attr & CounterBlockMcAttr) {
534538
const uint32_t grbm_value = (block_info->instance_count > 1)
535539
? Primitives::grbm_inst_index_value(block_des.index)
536540
: Primitives::grbm_broadcast_value();
537-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, grbm_value);
541+
SetGrbmGfxIndex(cmd_buffer, grbm_value);
538542
builder.BuildWritePConfigRegPacket(cmd_buffer, reg_info.control_addr,
539543
Primitives::mc_config_value(counter_des));
540544
uint32_t* data = reinterpret_cast<uint32_t*>(data_buffer) + read_counter;
@@ -594,7 +598,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
594598
if (bIsWGPcounter11) {
595599
for (int wgp=0; wgp<wgp_per_sa; wgp++) {
596600
grbm_value = Primitives::grbm_se_sh_wgp_index_value(se_index, sarray, wgp);
597-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, grbm_value);
601+
SetGrbmGfxIndex(cmd_buffer, grbm_value);
598602
builder.BuildCopyCounterDataPacket(
599603
cmd_buffer, reg_info.register_addr_lo, reg_info.register_addr_hi,
600604
reinterpret_cast<uint32_t*>(data_buffer) + read_counter, 1);
@@ -606,7 +610,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
606610
grbm_value = Primitives::grbm_inst_se_sh_wgp_index_value(block_des.index, se_index, sarray, wgp);
607611
else
608612
grbm_value = Primitives::grbm_se_sh_wgp_index_value(se_index, sarray, wgp);
609-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, grbm_value);
613+
SetGrbmGfxIndex(cmd_buffer, grbm_value);
610614
uint32_t dw_mask = reg_info.register_addr_hi.offset ? 3 : 1;
611615
builder.BuildCopyCounterDataPacket(
612616
cmd_buffer, reg_info.register_addr_lo, reg_info.register_addr_hi,
@@ -616,7 +620,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
616620
read_counter += 2;
617621
}
618622
} else {
619-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR, grbm_value);
623+
SetGrbmGfxIndex(cmd_buffer, grbm_value, block_info->attr);
620624
builder.BuildCopyCounterDataPacket(
621625
cmd_buffer, reg_info.register_addr_lo, reg_info.register_addr_hi,
622626
reinterpret_cast<uint32_t*>(data_buffer) + read_counter, 3);
@@ -626,17 +630,15 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
626630
}
627631
}
628632
// Reset Grbm to its default state - broadcast
629-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
630-
Primitives::grbm_broadcast_value());
633+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
631634
// Return amount of data to read
632635
return read_counter * sizeof(uint32_t);
633636
}
634637

635638
// Build PMC stop PM4 comands
636639
void Stop(CmdBuffer* cmd_buffer, const counters_vector& counters_vec) override {
637640
// Reset Grbm to its default state - broadcast
638-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::GRBM_GFX_INDEX_ADDR,
639-
Primitives::grbm_broadcast_value());
641+
SetGrbmBroadcast(cmd_buffer, counters_vec.get_attr());
640642

641643
uint32_t sdma_mask = 0;
642644
if (counters_vec.get_attr() & CounterBlockAidAttr)
@@ -734,9 +736,7 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
734736
}
735737

736738
// Issue barrier command to wait commands to complete
737-
if (counters_vec.get_attr() & CounterBlockCpmonAttr)
738-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR,
739-
Primitives::cp_perfmon_cntl_stop_value());
739+
SetPerfmonCntl(cmd_buffer, Primitives::cp_perfmon_cntl_stop_value(), counters_vec.get_attr());
740740

741741
// Enable RLC Perfmon Clock Gating. On Vega this
742742
// was disabled during Perf Cntrs collection session
@@ -752,9 +752,8 @@ class GpuPmcBuilder : public PmcBuilder, protected Primitives {
752752
uint32_t read_counter = 0;
753753
auto counters_attr = counters_vec.get_attr();
754754

755-
if (counters_vec.get_attr() & CounterBlockCpmonAttr)
756-
builder.BuildWriteUConfigRegPacket(cmd_buffer, Primitives::CP_PERFMON_CNTL_ADDR,
757-
Primitives::cp_perfmon_cntl_read_value());
755+
SetPerfmonCntl(cmd_buffer, Primitives::cp_perfmon_cntl_read_value(), counters_vec.get_attr());
756+
758757
// counters have UMC events: MI300 Loop over MI300 XCCs for each counter_des
759758
if (counters_attr & CounterBlockAidAttr)
760759
for (const auto& counter_des : counters_vec) {

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