@@ -356,7 +356,7 @@ class LegalizationArtifactCombiner {
356356 // trunc(ext x) -> x
357357 ArtifactValueFinder Finder (MRI, Builder, LI);
358358 if (Register FoundReg =
359- Finder.findValueFromDef (DstReg, 0 , DstTy.getSizeInBits ())) {
359+ Finder.findValueFromDef (DstReg, 0 , DstTy.getSizeInBits (), DstTy )) {
360360 LLT FoundRegTy = MRI.getType (FoundReg);
361361 if (DstTy == FoundRegTy) {
362362 LLVM_DEBUG (dbgs () << " .. Combine G_TRUNC(G_[S,Z,ANY]EXT/G_TRUNC...): "
@@ -641,10 +641,11 @@ class LegalizationArtifactCombiner {
641641 Register SrcReg = Concat.getReg (StartSrcIdx);
642642 if (InRegOffset == 0 && Size == SrcSize) {
643643 CurrentBest = SrcReg;
644- return findValueFromDefImpl (SrcReg, 0 , Size);
644+ return findValueFromDefImpl (SrcReg, 0 , Size, MRI. getType (SrcReg) );
645645 }
646646
647- return findValueFromDefImpl (SrcReg, InRegOffset, Size);
647+ return findValueFromDefImpl (SrcReg, InRegOffset, Size,
648+ MRI.getType (SrcReg));
648649 }
649650
650651 // / Given an build_vector op \p BV and a start bit and size, try to find
@@ -759,15 +760,17 @@ class LegalizationArtifactCombiner {
759760 if (EndBit <= InsertOffset || InsertedEndBit <= StartBit) {
760761 SrcRegToUse = ContainerSrcReg;
761762 NewStartBit = StartBit;
762- return findValueFromDefImpl (SrcRegToUse, NewStartBit, Size);
763+ return findValueFromDefImpl (SrcRegToUse, NewStartBit, Size,
764+ MRI.getType (SrcRegToUse));
763765 }
764766 if (InsertOffset <= StartBit && EndBit <= InsertedEndBit) {
765767 SrcRegToUse = InsertedReg;
766768 NewStartBit = StartBit - InsertOffset;
767769 if (NewStartBit == 0 &&
768770 Size == MRI.getType (SrcRegToUse).getSizeInBits ())
769771 CurrentBest = SrcRegToUse;
770- return findValueFromDefImpl (SrcRegToUse, NewStartBit, Size);
772+ return findValueFromDefImpl (SrcRegToUse, NewStartBit, Size,
773+ MRI.getType (SrcRegToUse));
771774 }
772775 // The bit range spans both the inserted and container regions.
773776 return Register ();
@@ -799,7 +802,7 @@ class LegalizationArtifactCombiner {
799802
800803 if (StartBit == 0 && SrcType.getSizeInBits () == Size)
801804 CurrentBest = SrcReg;
802- return findValueFromDefImpl (SrcReg, StartBit, Size);
805+ return findValueFromDefImpl (SrcReg, StartBit, Size, SrcType );
803806 }
804807
805808 // / Given an G_TRUNC op \p MI and a start bit and size, try to find
@@ -819,14 +822,14 @@ class LegalizationArtifactCombiner {
819822 if (!SrcType.isScalar ())
820823 return CurrentBest;
821824
822- return findValueFromDefImpl (SrcReg, StartBit, Size);
825+ return findValueFromDefImpl (SrcReg, StartBit, Size, SrcType );
823826 }
824827
825828 // / Internal implementation for findValueFromDef(). findValueFromDef()
826829 // / initializes some data like the CurrentBest register, which this method
827830 // / and its callees rely upon.
828831 Register findValueFromDefImpl (Register DefReg, unsigned StartBit,
829- unsigned Size) {
832+ unsigned Size, LLT DstTy ) {
830833 std::optional<DefinitionAndSourceRegister> DefSrcReg =
831834 getDefSrcRegIgnoringCopies (DefReg, MRI);
832835 MachineInstr *Def = DefSrcReg->MI ;
@@ -847,7 +850,7 @@ class LegalizationArtifactCombiner {
847850 }
848851 Register SrcReg = Def->getOperand (Def->getNumOperands () - 1 ).getReg ();
849852 Register SrcOriginReg =
850- findValueFromDefImpl (SrcReg, StartBit + DefStartBit, Size);
853+ findValueFromDefImpl (SrcReg, StartBit + DefStartBit, Size, DstTy );
851854 if (SrcOriginReg)
852855 return SrcOriginReg;
853856 // Failed to find a further value. If the StartBit and Size perfectly
@@ -868,6 +871,12 @@ class LegalizationArtifactCombiner {
868871 case TargetOpcode::G_ZEXT:
869872 case TargetOpcode::G_ANYEXT:
870873 return findValueFromExt (*Def, StartBit, Size);
874+ case TargetOpcode::G_IMPLICIT_DEF: {
875+ if (MRI.getType (DefReg) == DstTy)
876+ return DefReg;
877+ MIB.setInstrAndDebugLoc (*Def);
878+ return MIB.buildUndef (DstTy).getReg (0 );
879+ }
871880 default :
872881 return CurrentBest;
873882 }
@@ -882,10 +891,10 @@ class LegalizationArtifactCombiner {
882891 // / at position \p StartBit with size \p Size.
883892 // / \returns a register with the requested size, or an empty Register if no
884893 // / better value could be found.
885- Register findValueFromDef (Register DefReg, unsigned StartBit,
886- unsigned Size ) {
894+ Register findValueFromDef (Register DefReg, unsigned StartBit, unsigned Size,
895+ LLT DstTy ) {
887896 CurrentBest = Register ();
888- Register FoundReg = findValueFromDefImpl (DefReg, StartBit, Size);
897+ Register FoundReg = findValueFromDefImpl (DefReg, StartBit, Size, DstTy );
889898 return FoundReg != DefReg ? FoundReg : Register ();
890899 }
891900
@@ -904,7 +913,8 @@ class LegalizationArtifactCombiner {
904913 DeadDefs[DefIdx] = true ;
905914 continue ;
906915 }
907- Register FoundVal = findValueFromDef (DefReg, 0 , DestTy.getSizeInBits ());
916+ Register FoundVal =
917+ findValueFromDef (DefReg, 0 , DestTy.getSizeInBits (), DestTy);
908918 if (!FoundVal)
909919 continue ;
910920 if (MRI.getType (FoundVal) != DestTy)
@@ -923,7 +933,7 @@ class LegalizationArtifactCombiner {
923933
924934 GUnmerge *findUnmergeThatDefinesReg (Register Reg, unsigned Size,
925935 unsigned &DefOperandIdx) {
926- if (Register Def = findValueFromDefImpl (Reg, 0 , Size)) {
936+ if (Register Def = findValueFromDefImpl (Reg, 0 , Size, MRI. getType (Reg) )) {
927937 if (auto *Unmerge = dyn_cast<GUnmerge>(MRI.getVRegDef (Def))) {
928938 DefOperandIdx =
929939 Unmerge->findRegisterDefOperandIdx (Def, /* TRI=*/ nullptr );
@@ -1288,12 +1298,19 @@ class LegalizationArtifactCombiner {
12881298 // for N >= %2.getSizeInBits() / 2
12891299 // %3 = G_EXTRACT %1, (N - %0.getSizeInBits()
12901300
1301+ Register DstReg = MI.getOperand (0 ).getReg ();
12911302 Register SrcReg = lookThroughCopyInstrs (MI.getOperand (1 ).getReg ());
12921303 MachineInstr *MergeI = MRI.getVRegDef (SrcReg);
1304+ if (MergeI && MergeI->getOpcode () == TargetOpcode::G_IMPLICIT_DEF) {
1305+ Builder.setInstrAndDebugLoc (MI);
1306+ Builder.buildUndef (DstReg);
1307+ UpdatedDefs.push_back (DstReg);
1308+ markInstAndDefDead (MI, *MergeI, DeadInsts);
1309+ return true ;
1310+ }
12931311 if (!MergeI || !isa<GMergeLikeInstr>(MergeI))
12941312 return false ;
12951313
1296- Register DstReg = MI.getOperand (0 ).getReg ();
12971314 LLT DstTy = MRI.getType (DstReg);
12981315 LLT SrcTy = MRI.getType (SrcReg);
12991316
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