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.github/workflows/build-ci-container-windows.yml

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Original file line numberDiff line numberDiff line change
@@ -11,8 +11,6 @@ on:
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- .github/workflows/build-ci-container-windows.yml
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- '.github/workflows/containers/github-action-ci-windows/**'
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pull_request:
14-
branches:
15-
- main
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paths:
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- .github/workflows/build-ci-container-windows.yml
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- '.github/workflows/containers/github-action-ci-windows/**'

.github/workflows/build-ci-container.yml

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@@ -11,8 +11,6 @@ on:
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- .github/workflows/build-ci-container.yml
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- '.github/workflows/containers/github-action-ci/**'
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pull_request:
14-
branches:
15-
- main
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paths:
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- .github/workflows/build-ci-container.yml
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- '.github/workflows/containers/github-action-ci/**'

clang/docs/ReleaseNotes.rst

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -824,6 +824,7 @@ Bug Fixes in This Version
824824
nested scopes. (#GH147495)
825825
- Fixed a failed assertion with an operator call expression which comes from a
826826
macro expansion when performing analysis for nullability attributes. (#GH138371)
827+
- Fixed a concept equivalent checking crash due to untransformed constraint expressions. (#GH146614)
827828

828829
Bug Fixes to Compiler Builtins
829830
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -1226,6 +1227,8 @@ Static Analyzer
12261227
---------------
12271228
- Fixed a crash when C++20 parenthesized initializer lists are used. This issue
12281229
was causing a crash in clang-tidy. (#GH136041)
1230+
- The Clang Static Analyzer now handles parenthesized initialization.
1231+
(#GH148875)
12291232

12301233
New features
12311234
^^^^^^^^^^^^

clang/include/clang/Basic/BuiltinsAMDGPU.def

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -678,6 +678,7 @@ TARGET_BUILTIN(__builtin_amdgcn_tanhf, "ff", "nc", "tanh-insts")
678678
TARGET_BUILTIN(__builtin_amdgcn_tanhh, "hh", "nc", "tanh-insts")
679679
TARGET_BUILTIN(__builtin_amdgcn_tanh_bf16, "yy", "nc", "bf16-trans-insts")
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TARGET_BUILTIN(__builtin_amdgcn_rcp_bf16, "yy", "nc", "bf16-trans-insts")
681+
TARGET_BUILTIN(__builtin_amdgcn_sqrt_bf16, "yy", "nc", "bf16-trans-insts")
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TARGET_BUILTIN(__builtin_amdgcn_rsq_bf16, "yy", "nc", "bf16-trans-insts")
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TARGET_BUILTIN(__builtin_amdgcn_log_bf16, "yy", "nc", "bf16-trans-insts")
683684
TARGET_BUILTIN(__builtin_amdgcn_exp2_bf16, "yy", "nc", "bf16-trans-insts")
@@ -688,6 +689,8 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_f16_fp8, "hiIi", "nc", "gfx1250-insts")
688689
TARGET_BUILTIN(__builtin_amdgcn_cvt_f16_bf8, "hiIi", "nc", "gfx1250-insts")
689690
TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_f16_fp8, "V2hs", "nc", "gfx1250-insts")
690691
TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_f16_bf8, "V2hs", "nc", "gfx1250-insts")
692+
TARGET_BUILTIN(__builtin_amdgcn_sat_pk4_i4_i8, "UsUi", "nc", "gfx1250-insts")
693+
TARGET_BUILTIN(__builtin_amdgcn_sat_pk4_u4_u8, "UsUi", "nc", "gfx1250-insts")
691694

692695
// GFX1250 WMMA builtins
693696
TARGET_BUILTIN(__builtin_amdgcn_wmma_f32_16x16x4_f32, "V8fIbV2fIbV2fIsV8fIbIb", "nc", "gfx1250-insts,wavefrontsize32")

clang/include/clang/CIR/Dialect/IR/CIROps.td

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1739,20 +1739,24 @@ def CIR_SetBitfieldOp : CIR_Op<"set_bitfield"> {
17391739
%2 = cir.load %0 : !cir.ptr<!cir.ptr<!record_type>>, !cir.ptr<!record_type>
17401740
%3 = cir.get_member %2[1] {name = "e"} : !cir.ptr<!record_type>
17411741
-> !cir.ptr<!u16i>
1742-
%4 = cir.set_bitfield(#bfi_e, %3 : !cir.ptr<!u16i>, %1 : !s32i) -> !s32i
1742+
%4 = cir.set_bitfield align(4) (#bfi_e, %3 : !cir.ptr<!u16i>, %1 : !s32i)
1743+
-> !s32i
17431744
```
17441745
}];
17451746

17461747
let arguments = (ins
17471748
Arg<CIR_PointerType, "the address to store the value", [MemWrite]>:$addr,
17481749
CIR_AnyType:$src,
17491750
BitfieldInfoAttr:$bitfield_info,
1751+
DefaultValuedOptionalAttr<I64Attr, "0">:$alignment,
17501752
UnitAttr:$is_volatile
17511753
);
17521754

17531755
let results = (outs CIR_IntType:$result);
17541756

1755-
let assemblyFormat = [{ `(`$bitfield_info`,` $addr`:`qualified(type($addr))`,`
1757+
let assemblyFormat = [{
1758+
(`align` `(` $alignment^ `)`)?
1759+
`(`$bitfield_info`,` $addr`:`qualified(type($addr))`,`
17561760
$src`:`type($src) `)` attr-dict `->` type($result) }];
17571761

17581762
let builders = [
@@ -1764,14 +1768,15 @@ def CIR_SetBitfieldOp : CIR_Op<"set_bitfield"> {
17641768
"unsigned":$size,
17651769
"unsigned":$offset,
17661770
"bool":$is_signed,
1767-
"bool":$is_volatile
1771+
"bool":$is_volatile,
1772+
CArg<"unsigned", "0">:$alignment
17681773
),
17691774
[{
17701775
BitfieldInfoAttr info =
17711776
BitfieldInfoAttr::get($_builder.getContext(),
17721777
name, storage_type,
17731778
size, offset, is_signed);
1774-
build($_builder, $_state, type, addr, src, info, is_volatile);
1779+
build($_builder, $_state, type, addr, src, info, alignment, is_volatile);
17751780
}]>
17761781
];
17771782
}
@@ -1823,20 +1828,23 @@ def CIR_GetBitfieldOp : CIR_Op<"get_bitfield"> {
18231828
%2 = cir.load %0 : !cir.ptr<!cir.ptr<!record_type>>, !cir.ptr<!record_type>
18241829
%3 = cir.get_member %2[1] {name = "e"} : !cir.ptr<!record_type>
18251830
-> !cir.ptr<!u16i>
1826-
%4 = cir.get_bitfield(#bfi_e, %3 : !cir.ptr<!u16i>) -> !s32i
1831+
%4 = cir.get_bitfield align(4) (#bfi_e, %3 : !cir.ptr<!u16i>) -> !s32i
18271832
```
18281833
}];
18291834

18301835
let arguments = (ins
18311836
Arg<CIR_PointerType, "the address to load from", [MemRead]>:$addr,
18321837
BitfieldInfoAttr:$bitfield_info,
1838+
DefaultValuedOptionalAttr<I64Attr, "0">:$alignment,
18331839
UnitAttr:$is_volatile
18341840
);
18351841

18361842
let results = (outs CIR_IntType:$result);
18371843

1838-
let assemblyFormat = [{ `(`$bitfield_info `,` $addr attr-dict `:`
1839-
qualified(type($addr)) `)` `->` type($result) }];
1844+
let assemblyFormat = [{
1845+
(`align` `(` $alignment^ `)`)?
1846+
`(`$bitfield_info `,` $addr attr-dict `:`
1847+
qualified(type($addr)) `)` `->` type($result) }];
18401848

18411849
let builders = [
18421850
OpBuilder<(ins "mlir::Type":$type,
@@ -1846,14 +1854,15 @@ def CIR_GetBitfieldOp : CIR_Op<"get_bitfield"> {
18461854
"unsigned":$size,
18471855
"unsigned":$offset,
18481856
"bool":$is_signed,
1849-
"bool":$is_volatile
1857+
"bool":$is_volatile,
1858+
CArg<"unsigned", "0">:$alignment
18501859
),
18511860
[{
18521861
BitfieldInfoAttr info =
18531862
BitfieldInfoAttr::get($_builder.getContext(),
18541863
name, storage_type,
18551864
size, offset, is_signed);
1856-
build($_builder, $_state, type, addr, info, is_volatile);
1865+
build($_builder, $_state, type, addr, info, alignment, is_volatile);
18571866
}]>
18581867
];
18591868
}

clang/include/clang/Sema/Overload.h

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Original file line numberDiff line numberDiff line change
@@ -1491,8 +1491,6 @@ class Sema;
14911491
OverloadingResult
14921492
BestViableFunctionImpl(Sema &S, SourceLocation Loc,
14931493
OverloadCandidateSet::iterator &Best);
1494-
void PerfectViableFunction(Sema &S, SourceLocation Loc,
1495-
OverloadCandidateSet::iterator &Best);
14961494
};
14971495

14981496
bool isBetterOverloadCandidate(Sema &S, const OverloadCandidate &Cand1,

clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -499,9 +499,6 @@ class ExprEngine {
499499
void VisitGuardedExpr(const Expr *Ex, const Expr *L, const Expr *R,
500500
ExplodedNode *Pred, ExplodedNodeSet &Dst);
501501

502-
void VisitInitListExpr(const InitListExpr *E, ExplodedNode *Pred,
503-
ExplodedNodeSet &Dst);
504-
505502
/// VisitAttributedStmt - Transfer function logic for AttributedStmt.
506503
void VisitAttributedStmt(const AttributedStmt *A, ExplodedNode *Pred,
507504
ExplodedNodeSet &Dst);
@@ -591,6 +588,10 @@ class ExprEngine {
591588
ExplodedNode *Pred,
592589
ExplodedNodeSet &Dst);
593590

591+
void ConstructInitList(const Expr *Source, ArrayRef<Expr *> Args,
592+
bool IsTransparent, ExplodedNode *Pred,
593+
ExplodedNodeSet &Dst);
594+
594595
/// evalEagerlyAssumeBifurcation - Given the nodes in 'Src', eagerly assume
595596
/// concrete boolean values for 'Ex', storing the resulting nodes in 'Dst'.
596597
void evalEagerlyAssumeBifurcation(ExplodedNodeSet &Dst, ExplodedNodeSet &Src,

clang/lib/AST/ByteCode/Descriptor.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -162,6 +162,8 @@ static void initField(Block *B, std::byte *Ptr, bool IsConst, bool IsMutable,
162162
Desc->IsConst = IsConst || D->IsConst;
163163
Desc->IsFieldMutable = IsMutable || D->IsMutable;
164164
Desc->IsVolatile = IsVolatile || D->IsVolatile;
165+
// True if this field is const AND the parent is mutable.
166+
Desc->IsConstInMutable = Desc->IsConst && IsMutable;
165167

166168
if (auto Fn = D->CtorFn)
167169
Fn(B, Ptr + FieldOffset, Desc->IsConst, Desc->IsFieldMutable,

clang/lib/AST/ByteCode/Descriptor.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,10 @@ struct InlineDescriptor {
101101
/// Flag indicating if the field is mutable (if in a record).
102102
LLVM_PREFERRED_TYPE(bool)
103103
unsigned IsFieldMutable : 1;
104+
/// Flag indicating if this field is a const field nested in
105+
/// a mutable parent field.
106+
LLVM_PREFERRED_TYPE(bool)
107+
unsigned IsConstInMutable : 1;
104108
/// Flag indicating if the field is an element of a composite array.
105109
LLVM_PREFERRED_TYPE(bool)
106110
unsigned IsArrayElement : 1;

clang/lib/AST/ByteCode/Disasm.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -445,6 +445,7 @@ LLVM_DUMP_METHOD void InlineDescriptor::dump(llvm::raw_ostream &OS) const {
445445
OS << "InUnion: " << InUnion << "\n";
446446
OS << "IsFieldMutable: " << IsFieldMutable << "\n";
447447
OS << "IsArrayElement: " << IsArrayElement << "\n";
448+
OS << "IsConstInMutable: " << IsConstInMutable << '\n';
448449
OS << "Desc: ";
449450
if (Desc)
450451
Desc->dump(OS);

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