Skip to content

Commit 2b7634d

Browse files
author
dsalinas_amdeng
committed
[clang][CodeGen] Fix crash on non-natural type in CheckAtomicAlignment llvm#141053
1 parent 3a4a864 commit 2b7634d

File tree

2 files changed

+43
-1
lines changed

2 files changed

+43
-1
lines changed

clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -359,9 +359,10 @@ static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V,
359359
static Address CheckAtomicAlignment(CodeGenFunction &CGF, const CallExpr *E) {
360360
ASTContext &Ctx = CGF.getContext();
361361
Address Ptr = CGF.EmitPointerWithAlignment(E->getArg(0));
362+
const llvm::DataLayout &DL = CGF.CGM.getDataLayout();
362363
unsigned Bytes = Ptr.getElementType()->isPointerTy()
363364
? Ctx.getTypeSizeInChars(Ctx.VoidPtrTy).getQuantity()
364-
: Ptr.getElementType()->getScalarSizeInBits() / 8;
365+
: DL.getTypeStoreSize(Ptr.getElementType());
365366
unsigned Align = Ptr.getAlignment().getQuantity();
366367
if (Align % Bytes != 0) {
367368
DiagnosticsEngine &Diags = CGF.CGM.getDiags();
Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
2+
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx942 \
3+
// RUN: %s -emit-llvm -o - -disable-llvm-passes | FileCheck %s
4+
5+
// REQUIRES: amdgpu-registered-target
6+
7+
// `Ptr.getElementType()` in `CheckAtomicAlignment` returns
8+
// %struct.__half2 = type { %union.anon }
9+
// Check we do not crash when handling that.
10+
11+
typedef half __attribute__((ext_vector_type(2))) half2;
12+
typedef short __attribute__((ext_vector_type(2))) short2;
13+
14+
struct __half2 {
15+
union {
16+
struct {
17+
half x;
18+
half y;
19+
};
20+
half2 data;
21+
};
22+
};
23+
24+
// CHECK-LABEL: define dso_local <2 x half> @test_flat_add_2f16(
25+
// CHECK-SAME: ptr noundef [[ADDR:%.*]], <2 x half> noundef [[VAL:%.*]]) #[[ATTR0:[0-9]+]] {
26+
// CHECK-NEXT: [[ENTRY:.*:]]
27+
// CHECK-NEXT: [[ADDR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
28+
// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca <2 x half>, align 4, addrspace(5)
29+
// CHECK-NEXT: store ptr [[ADDR]], ptr addrspace(5) [[ADDR_ADDR]], align 8
30+
// CHECK-NEXT: store <2 x half> [[VAL]], ptr addrspace(5) [[VAL_ADDR]], align 4
31+
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr addrspace(5) [[ADDR_ADDR]], align 8
32+
// CHECK-NEXT: [[TMP1:%.*]] = load <2 x half>, ptr addrspace(5) [[VAL_ADDR]], align 4
33+
// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], <2 x half> [[TMP1]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4:![0-9]+]]
34+
// CHECK-NEXT: ret <2 x half> [[TMP2]]
35+
//
36+
half2 test_flat_add_2f16(short2 *addr, half2 val) {
37+
return __builtin_amdgcn_flat_atomic_fadd_v2f16((struct __half2*)addr, val);
38+
}
39+
//.
40+
// CHECK: [[META4]] = !{}
41+
//.

0 commit comments

Comments
 (0)