Skip to content

Commit 2fac5a9

Browse files
zhaoqi5zhaoqi5
authored
[LoongArch][NFC] Pre-commit tests for vector type avg{floor/ceil}{s/u} (llvm#165821)
1 parent 7de242b commit 2fac5a9

File tree

2 files changed

+758
-0
lines changed

2 files changed

+758
-0
lines changed

‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/avgfloor-ceil.ll‎

Lines changed: 379 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,379 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
2+
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
3+
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
4+
5+
define void @xvavg_b(ptr %res, ptr %a, ptr %b) nounwind {
6+
; CHECK-LABEL: xvavg_b:
7+
; CHECK: # %bb.0: # %entry
8+
; CHECK-NEXT: xvld $xr0, $a1, 0
9+
; CHECK-NEXT: xvld $xr1, $a2, 0
10+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
11+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
12+
; CHECK-NEXT: xvsrai.b $xr0, $xr0, 1
13+
; CHECK-NEXT: xvadd.b $xr0, $xr2, $xr0
14+
; CHECK-NEXT: xvst $xr0, $a0, 0
15+
; CHECK-NEXT: ret
16+
entry:
17+
%va = load <32 x i8>, ptr %a
18+
%vb = load <32 x i8>, ptr %b
19+
%ea = sext <32 x i8> %va to <32 x i16>
20+
%eb = sext <32 x i8> %vb to <32 x i16>
21+
%add = add <32 x i16> %ea, %eb
22+
%shr = lshr <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
23+
%r = trunc <32 x i16> %shr to <32 x i8>
24+
store <32 x i8> %r, ptr %res
25+
ret void
26+
}
27+
28+
define void @xvavg_h(ptr %res, ptr %a, ptr %b) nounwind {
29+
; CHECK-LABEL: xvavg_h:
30+
; CHECK: # %bb.0: # %entry
31+
; CHECK-NEXT: xvld $xr0, $a1, 0
32+
; CHECK-NEXT: xvld $xr1, $a2, 0
33+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
34+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
35+
; CHECK-NEXT: xvsrai.h $xr0, $xr0, 1
36+
; CHECK-NEXT: xvadd.h $xr0, $xr2, $xr0
37+
; CHECK-NEXT: xvst $xr0, $a0, 0
38+
; CHECK-NEXT: ret
39+
entry:
40+
%va = load <16 x i16>, ptr %a
41+
%vb = load <16 x i16>, ptr %b
42+
%ea = sext <16 x i16> %va to <16 x i32>
43+
%eb = sext <16 x i16> %vb to <16 x i32>
44+
%add = add <16 x i32> %ea, %eb
45+
%shr = lshr <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
46+
%r = trunc <16 x i32> %shr to <16 x i16>
47+
store <16 x i16> %r, ptr %res
48+
ret void
49+
}
50+
51+
define void @xvavg_w(ptr %res, ptr %a, ptr %b) nounwind {
52+
; CHECK-LABEL: xvavg_w:
53+
; CHECK: # %bb.0: # %entry
54+
; CHECK-NEXT: xvld $xr0, $a1, 0
55+
; CHECK-NEXT: xvld $xr1, $a2, 0
56+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
57+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
58+
; CHECK-NEXT: xvsrai.w $xr0, $xr0, 1
59+
; CHECK-NEXT: xvadd.w $xr0, $xr2, $xr0
60+
; CHECK-NEXT: xvst $xr0, $a0, 0
61+
; CHECK-NEXT: ret
62+
entry:
63+
%va = load <8 x i32>, ptr %a
64+
%vb = load <8 x i32>, ptr %b
65+
%ea = sext <8 x i32> %va to <8 x i64>
66+
%eb = sext <8 x i32> %vb to <8 x i64>
67+
%add = add <8 x i64> %ea, %eb
68+
%shr = lshr <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
69+
%r = trunc <8 x i64> %shr to <8 x i32>
70+
store <8 x i32> %r, ptr %res
71+
ret void
72+
}
73+
74+
define void @xvavg_d(ptr %res, ptr %a, ptr %b) nounwind {
75+
; CHECK-LABEL: xvavg_d:
76+
; CHECK: # %bb.0: # %entry
77+
; CHECK-NEXT: xvld $xr0, $a1, 0
78+
; CHECK-NEXT: xvld $xr1, $a2, 0
79+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
80+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
81+
; CHECK-NEXT: xvsrai.d $xr0, $xr0, 1
82+
; CHECK-NEXT: xvadd.d $xr0, $xr2, $xr0
83+
; CHECK-NEXT: xvst $xr0, $a0, 0
84+
; CHECK-NEXT: ret
85+
entry:
86+
%va = load <4 x i64>, ptr %a
87+
%vb = load <4 x i64>, ptr %b
88+
%ea = sext <4 x i64> %va to <4 x i128>
89+
%eb = sext <4 x i64> %vb to <4 x i128>
90+
%add = add <4 x i128> %ea, %eb
91+
%shr = lshr <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>
92+
%r = trunc <4 x i128> %shr to <4 x i64>
93+
store <4 x i64> %r, ptr %res
94+
ret void
95+
}
96+
97+
define void @xvavg_bu(ptr %res, ptr %a, ptr %b) nounwind {
98+
; CHECK-LABEL: xvavg_bu:
99+
; CHECK: # %bb.0: # %entry
100+
; CHECK-NEXT: xvld $xr0, $a1, 0
101+
; CHECK-NEXT: xvld $xr1, $a2, 0
102+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
103+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
104+
; CHECK-NEXT: xvsrli.b $xr0, $xr0, 1
105+
; CHECK-NEXT: xvadd.b $xr0, $xr2, $xr0
106+
; CHECK-NEXT: xvst $xr0, $a0, 0
107+
; CHECK-NEXT: ret
108+
entry:
109+
%va = load <32 x i8>, ptr %a
110+
%vb = load <32 x i8>, ptr %b
111+
%ea = zext <32 x i8> %va to <32 x i16>
112+
%eb = zext <32 x i8> %vb to <32 x i16>
113+
%add = add <32 x i16> %ea, %eb
114+
%shr = lshr <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
115+
%r = trunc <32 x i16> %shr to <32 x i8>
116+
store <32 x i8> %r, ptr %res
117+
ret void
118+
}
119+
120+
define void @xvavg_hu(ptr %res, ptr %a, ptr %b) nounwind {
121+
; CHECK-LABEL: xvavg_hu:
122+
; CHECK: # %bb.0: # %entry
123+
; CHECK-NEXT: xvld $xr0, $a1, 0
124+
; CHECK-NEXT: xvld $xr1, $a2, 0
125+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
126+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
127+
; CHECK-NEXT: xvsrli.h $xr0, $xr0, 1
128+
; CHECK-NEXT: xvadd.h $xr0, $xr2, $xr0
129+
; CHECK-NEXT: xvst $xr0, $a0, 0
130+
; CHECK-NEXT: ret
131+
entry:
132+
%va = load <16 x i16>, ptr %a
133+
%vb = load <16 x i16>, ptr %b
134+
%ea = zext <16 x i16> %va to <16 x i32>
135+
%eb = zext <16 x i16> %vb to <16 x i32>
136+
%add = add <16 x i32> %ea, %eb
137+
%shr = lshr <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
138+
%r = trunc <16 x i32> %shr to <16 x i16>
139+
store <16 x i16> %r, ptr %res
140+
ret void
141+
}
142+
143+
define void @xvavg_wu(ptr %res, ptr %a, ptr %b) nounwind {
144+
; CHECK-LABEL: xvavg_wu:
145+
; CHECK: # %bb.0: # %entry
146+
; CHECK-NEXT: xvld $xr0, $a1, 0
147+
; CHECK-NEXT: xvld $xr1, $a2, 0
148+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
149+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
150+
; CHECK-NEXT: xvsrli.w $xr0, $xr0, 1
151+
; CHECK-NEXT: xvadd.w $xr0, $xr2, $xr0
152+
; CHECK-NEXT: xvst $xr0, $a0, 0
153+
; CHECK-NEXT: ret
154+
entry:
155+
%va = load <8 x i32>, ptr %a
156+
%vb = load <8 x i32>, ptr %b
157+
%ea = zext <8 x i32> %va to <8 x i64>
158+
%eb = zext <8 x i32> %vb to <8 x i64>
159+
%add = add <8 x i64> %ea, %eb
160+
%shr = lshr <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
161+
%r = trunc <8 x i64> %shr to <8 x i32>
162+
store <8 x i32> %r, ptr %res
163+
ret void
164+
}
165+
166+
define void @xvavg_du(ptr %res, ptr %a, ptr %b) nounwind {
167+
; CHECK-LABEL: xvavg_du:
168+
; CHECK: # %bb.0: # %entry
169+
; CHECK-NEXT: xvld $xr0, $a1, 0
170+
; CHECK-NEXT: xvld $xr1, $a2, 0
171+
; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1
172+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
173+
; CHECK-NEXT: xvsrli.d $xr0, $xr0, 1
174+
; CHECK-NEXT: xvadd.d $xr0, $xr2, $xr0
175+
; CHECK-NEXT: xvst $xr0, $a0, 0
176+
; CHECK-NEXT: ret
177+
entry:
178+
%va = load <4 x i64>, ptr %a
179+
%vb = load <4 x i64>, ptr %b
180+
%ea = zext <4 x i64> %va to <4 x i128>
181+
%eb = zext <4 x i64> %vb to <4 x i128>
182+
%add = add <4 x i128> %ea, %eb
183+
%shr = lshr <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>
184+
%r = trunc <4 x i128> %shr to <4 x i64>
185+
store <4 x i64> %r, ptr %res
186+
ret void
187+
}
188+
189+
define void @xvavgr_b(ptr %res, ptr %a, ptr %b) nounwind {
190+
; CHECK-LABEL: xvavgr_b:
191+
; CHECK: # %bb.0: # %entry
192+
; CHECK-NEXT: xvld $xr0, $a1, 0
193+
; CHECK-NEXT: xvld $xr1, $a2, 0
194+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
195+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
196+
; CHECK-NEXT: xvsrai.b $xr0, $xr0, 1
197+
; CHECK-NEXT: xvsub.b $xr0, $xr2, $xr0
198+
; CHECK-NEXT: xvst $xr0, $a0, 0
199+
; CHECK-NEXT: ret
200+
entry:
201+
%va = load <32 x i8>, ptr %a
202+
%vb = load <32 x i8>, ptr %b
203+
%ea = sext <32 x i8> %va to <32 x i16>
204+
%eb = sext <32 x i8> %vb to <32 x i16>
205+
%add = add <32 x i16> %ea, %eb
206+
%add1 = add <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
207+
%shr = lshr <32 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
208+
%r = trunc <32 x i16> %shr to <32 x i8>
209+
store <32 x i8> %r, ptr %res
210+
ret void
211+
}
212+
213+
define void @xvavgr_h(ptr %res, ptr %a, ptr %b) nounwind {
214+
; CHECK-LABEL: xvavgr_h:
215+
; CHECK: # %bb.0: # %entry
216+
; CHECK-NEXT: xvld $xr0, $a1, 0
217+
; CHECK-NEXT: xvld $xr1, $a2, 0
218+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
219+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
220+
; CHECK-NEXT: xvsrai.h $xr0, $xr0, 1
221+
; CHECK-NEXT: xvsub.h $xr0, $xr2, $xr0
222+
; CHECK-NEXT: xvst $xr0, $a0, 0
223+
; CHECK-NEXT: ret
224+
entry:
225+
%va = load <16 x i16>, ptr %a
226+
%vb = load <16 x i16>, ptr %b
227+
%ea = sext <16 x i16> %va to <16 x i32>
228+
%eb = sext <16 x i16> %vb to <16 x i32>
229+
%add = add <16 x i32> %ea, %eb
230+
%add1 = add <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
231+
%shr = lshr <16 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
232+
%r = trunc <16 x i32> %shr to <16 x i16>
233+
store <16 x i16> %r, ptr %res
234+
ret void
235+
}
236+
237+
define void @xvavgr_w(ptr %res, ptr %a, ptr %b) nounwind {
238+
; CHECK-LABEL: xvavgr_w:
239+
; CHECK: # %bb.0: # %entry
240+
; CHECK-NEXT: xvld $xr0, $a1, 0
241+
; CHECK-NEXT: xvld $xr1, $a2, 0
242+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
243+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
244+
; CHECK-NEXT: xvsrai.w $xr0, $xr0, 1
245+
; CHECK-NEXT: xvsub.w $xr0, $xr2, $xr0
246+
; CHECK-NEXT: xvst $xr0, $a0, 0
247+
; CHECK-NEXT: ret
248+
entry:
249+
%va = load <8 x i32>, ptr %a
250+
%vb = load <8 x i32>, ptr %b
251+
%ea = sext <8 x i32> %va to <8 x i64>
252+
%eb = sext <8 x i32> %vb to <8 x i64>
253+
%add = add <8 x i64> %ea, %eb
254+
%add1 = add <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
255+
%shr = lshr <8 x i64> %add1, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
256+
%r = trunc <8 x i64> %shr to <8 x i32>
257+
store <8 x i32> %r, ptr %res
258+
ret void
259+
}
260+
261+
define void @xvavgr_d(ptr %res, ptr %a, ptr %b) nounwind {
262+
; CHECK-LABEL: xvavgr_d:
263+
; CHECK: # %bb.0: # %entry
264+
; CHECK-NEXT: xvld $xr0, $a1, 0
265+
; CHECK-NEXT: xvld $xr1, $a2, 0
266+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
267+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
268+
; CHECK-NEXT: xvsrai.d $xr0, $xr0, 1
269+
; CHECK-NEXT: xvsub.d $xr0, $xr2, $xr0
270+
; CHECK-NEXT: xvst $xr0, $a0, 0
271+
; CHECK-NEXT: ret
272+
entry:
273+
%va = load <4 x i64>, ptr %a
274+
%vb = load <4 x i64>, ptr %b
275+
%ea = sext <4 x i64> %va to <4 x i128>
276+
%eb = sext <4 x i64> %vb to <4 x i128>
277+
%add = add <4 x i128> %ea, %eb
278+
%add1 = add <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>
279+
%shr = lshr <4 x i128> %add1, <i128 1, i128 1, i128 1, i128 1>
280+
%r = trunc <4 x i128> %shr to <4 x i64>
281+
store <4 x i64> %r, ptr %res
282+
ret void
283+
}
284+
285+
define void @xvavgr_bu(ptr %res, ptr %a, ptr %b) nounwind {
286+
; CHECK-LABEL: xvavgr_bu:
287+
; CHECK: # %bb.0: # %entry
288+
; CHECK-NEXT: xvld $xr0, $a1, 0
289+
; CHECK-NEXT: xvld $xr1, $a2, 0
290+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
291+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
292+
; CHECK-NEXT: xvsrli.b $xr0, $xr0, 1
293+
; CHECK-NEXT: xvsub.b $xr0, $xr2, $xr0
294+
; CHECK-NEXT: xvst $xr0, $a0, 0
295+
; CHECK-NEXT: ret
296+
entry:
297+
%va = load <32 x i8>, ptr %a
298+
%vb = load <32 x i8>, ptr %b
299+
%ea = zext <32 x i8> %va to <32 x i16>
300+
%eb = zext <32 x i8> %vb to <32 x i16>
301+
%add = add <32 x i16> %ea, %eb
302+
%add1 = add <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
303+
%shr = lshr <32 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
304+
%r = trunc <32 x i16> %shr to <32 x i8>
305+
store <32 x i8> %r, ptr %res
306+
ret void
307+
}
308+
309+
define void @xvavgr_hu(ptr %res, ptr %a, ptr %b) nounwind {
310+
; CHECK-LABEL: xvavgr_hu:
311+
; CHECK: # %bb.0: # %entry
312+
; CHECK-NEXT: xvld $xr0, $a1, 0
313+
; CHECK-NEXT: xvld $xr1, $a2, 0
314+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
315+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
316+
; CHECK-NEXT: xvsrli.h $xr0, $xr0, 1
317+
; CHECK-NEXT: xvsub.h $xr0, $xr2, $xr0
318+
; CHECK-NEXT: xvst $xr0, $a0, 0
319+
; CHECK-NEXT: ret
320+
entry:
321+
%va = load <16 x i16>, ptr %a
322+
%vb = load <16 x i16>, ptr %b
323+
%ea = zext <16 x i16> %va to <16 x i32>
324+
%eb = zext <16 x i16> %vb to <16 x i32>
325+
%add = add <16 x i32> %ea, %eb
326+
%add1 = add <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
327+
%shr = lshr <16 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
328+
%r = trunc <16 x i32> %shr to <16 x i16>
329+
store <16 x i16> %r, ptr %res
330+
ret void
331+
}
332+
333+
define void @xvavgr_wu(ptr %res, ptr %a, ptr %b) nounwind {
334+
; CHECK-LABEL: xvavgr_wu:
335+
; CHECK: # %bb.0: # %entry
336+
; CHECK-NEXT: xvld $xr0, $a1, 0
337+
; CHECK-NEXT: xvld $xr1, $a2, 0
338+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
339+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
340+
; CHECK-NEXT: xvsrli.w $xr0, $xr0, 1
341+
; CHECK-NEXT: xvsub.w $xr0, $xr2, $xr0
342+
; CHECK-NEXT: xvst $xr0, $a0, 0
343+
; CHECK-NEXT: ret
344+
entry:
345+
%va = load <8 x i32>, ptr %a
346+
%vb = load <8 x i32>, ptr %b
347+
%ea = zext <8 x i32> %va to <8 x i64>
348+
%eb = zext <8 x i32> %vb to <8 x i64>
349+
%add = add <8 x i64> %ea, %eb
350+
%add1 = add <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
351+
%shr = lshr <8 x i64> %add1, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
352+
%r = trunc <8 x i64> %shr to <8 x i32>
353+
store <8 x i32> %r, ptr %res
354+
ret void
355+
}
356+
357+
define void @xvavgr_du(ptr %res, ptr %a, ptr %b) nounwind {
358+
; CHECK-LABEL: xvavgr_du:
359+
; CHECK: # %bb.0: # %entry
360+
; CHECK-NEXT: xvld $xr0, $a1, 0
361+
; CHECK-NEXT: xvld $xr1, $a2, 0
362+
; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1
363+
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
364+
; CHECK-NEXT: xvsrli.d $xr0, $xr0, 1
365+
; CHECK-NEXT: xvsub.d $xr0, $xr2, $xr0
366+
; CHECK-NEXT: xvst $xr0, $a0, 0
367+
; CHECK-NEXT: ret
368+
entry:
369+
%va = load <4 x i64>, ptr %a
370+
%vb = load <4 x i64>, ptr %b
371+
%ea = zext <4 x i64> %va to <4 x i128>
372+
%eb = zext <4 x i64> %vb to <4 x i128>
373+
%add = add <4 x i128> %ea, %eb
374+
%add1 = add <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>
375+
%shr = lshr <4 x i128> %add1, <i128 1, i128 1, i128 1, i128 1>
376+
%r = trunc <4 x i128> %shr to <4 x i64>
377+
store <4 x i64> %r, ptr %res
378+
ret void
379+
}

0 commit comments

Comments
 (0)