Skip to content

Commit 3dc05ec

Browse files
kzhuravlShoreshen
authored andcommitted
SWDEV-520417 - Cherry-pick fixes from Shore to amd-mainline (llvm#1470)
Co-authored-by: Shoreshen <[email protected]>
1 parent 6d585d8 commit 3dc05ec

File tree

1 file changed

+30
-0
lines changed

1 file changed

+30
-0
lines changed

llvm/lib/Target/AMDGPU/SIInstructions.td

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1847,6 +1847,36 @@ foreach vt = Reg512Types.types in {
18471847
}
18481848
}
18491849

1850+
def : BitConvert <v32f16, v32i16, VReg_512>;
1851+
def : BitConvert <v32i16, v32f16, VReg_512>;
1852+
def : BitConvert <v32f16, v16i32, VReg_512>;
1853+
def : BitConvert <v32f16, v16f32, VReg_512>;
1854+
def : BitConvert <v16f32, v32f16, VReg_512>;
1855+
def : BitConvert <v16i32, v32f16, VReg_512>;
1856+
def : BitConvert <v32i16, v16i32, VReg_512>;
1857+
def : BitConvert <v32i16, v16f32, VReg_512>;
1858+
def : BitConvert <v16f32, v32i16, VReg_512>;
1859+
def : BitConvert <v16i32, v32i16, VReg_512>;
1860+
def : BitConvert <v16i32, v16f32, VReg_512>;
1861+
def : BitConvert <v16f32, v16i32, VReg_512>;
1862+
def : BitConvert <v8i64, v8f64, VReg_512>;
1863+
def : BitConvert <v8f64, v8i64, VReg_512>;
1864+
def : BitConvert <v8i64, v16i32, VReg_512>;
1865+
def : BitConvert <v8f64, v16i32, VReg_512>;
1866+
def : BitConvert <v16i32, v8i64, VReg_512>;
1867+
def : BitConvert <v16i32, v8f64, VReg_512>;
1868+
def : BitConvert <v8i64, v16f32, VReg_512>;
1869+
def : BitConvert <v8f64, v16f32, VReg_512>;
1870+
def : BitConvert <v16f32, v8i64, VReg_512>;
1871+
def : BitConvert <v16f32, v8f64, VReg_512>;
1872+
def : BitConvert <v8i64, v32f16, VReg_512>;
1873+
def : BitConvert <v8i64, v32i16, VReg_512>;
1874+
def : BitConvert <v8f64, v32f16, VReg_512>;
1875+
def : BitConvert <v8f64, v32i16, VReg_512>;
1876+
def : BitConvert <v32f16, v8i64, VReg_512>;
1877+
def : BitConvert <v32f16, v8f64, VReg_512>;
1878+
def : BitConvert <v32i16, v8i64, VReg_512>;
1879+
def : BitConvert <v32i16, v8f64, VReg_512>;
18501880

18511881
// 1024-bit bitcast
18521882
foreach vt = Reg1024Types.types in {

0 commit comments

Comments
 (0)